Abstract:
We implemented node monitoring subsystem on a small FPGA using low delay architecture and overdetermined linear system to reduce the computational complexity. Processing ...Show MoreMetadata
Abstract:
We implemented node monitoring subsystem on a small FPGA using low delay architecture and overdetermined linear system to reduce the computational complexity. Processing time of monitored data was below 250ns except for required filtering time.
Date of Conference: 03-06 July 2022
Date Added to IEEE Xplore: 17 August 2022
ISBN Information: