Abstract:
The embedded software systems are first designed and validated by high level models such as MATLAB/Simulink functional models. However, implementing a Simulink functional...Show MoreMetadata
Abstract:
The embedded software systems are first designed and validated by high level models such as MATLAB/Simulink functional models. However, implementing a Simulink functional model on multicore architecture is not trivial. Designers might need first to select an adequate multicore architecture that provides a higher performance for a given Simulink model. Hence, it is important to have a set of performance metrics at hand that assist the designers to select the adequate architecture. This paper presents an approach to evaluate the performance of a given Simulink model running on multicore architecture. For this purpose, a given Simulink model is mapped to synchronous dataflow graph, the graph is then scheduled with objective to minimize it iteration period, resulting in performance metrics such as speedup and efficiency. Based on these metrics, an industrial Simulink models is analyzed and a fitting multicore architecture is proposed.
Published in: 2017 25th International Conference on Software, Telecommunications and Computer Networks (SoftCOM)
Date of Conference: 21-23 September 2017
Date Added to IEEE Xplore: 23 November 2017
ISBN Information:
Electronic ISSN: 1847-358X