Abstract:
This paper presents a low-dropout (LDO) regulators that can supply up to 0.3A output current with high power supply rejection (PSR). The proposed BGR-recursive LDO design...Show MoreMetadata
Abstract:
This paper presents a low-dropout (LDO) regulators that can supply up to 0.3A output current with high power supply rejection (PSR). The proposed BGR-recursive LDO design with PSR-boosting feedforward improves the PSR while consuming a low quiescent current of ≤50μA. Among the state-of-the-art LDOs, the proposed chip fabricated in 0.5-μm CMOS achieves the highest PSR of 102-to-80dB in the frequency range from 100Hz to 0.1MHz with a current efficiency of 99.98% and shows the best FoM of 11ps in the transient response performance.
Published in: 2019 Symposium on VLSI Circuits
Date of Conference: 09-14 June 2019
Date Added to IEEE Xplore: 29 July 2019
ISBN Information: