Abstract
A technique of designing programmable built-in random access memory self-testing devices is considered. An analysis of destructive march tests is performed for the purpose of achieving optimal representation of such tests in binary code. This makes it possible to reduce the hardware costs associated with implementation of the microprogram memory of built-in self-testing modules and to accelerate the transmission of tests by means of serial test interfaces.
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Original Russian Text © A.A. Ivanyuk, V.N. Yarmolik, 2008, published in Avtomatika i Vychislitel’naya Tekhnika, 2008, No. 4, pp. 5–13.
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Ivanyuk, A.A., Yarmolik, V.N. A new approach to the design of built-in internal memory self-testing devices. Aut. Conrol Comp. Sci. 42, 169–174 (2008). https://doi.org/10.3103/S0146411608040019
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DOI: https://doi.org/10.3103/S0146411608040019