Abstract
A review of methods and approaches for programming of “discrete” problems for programmable logic controllers (PLC) based on the example of constructing a program for controlling a code lock. The usability of the analysis of a program correctness by the model checking method with respect to a Cadence SMV automatic verification tool is evaluated for these approaches. Possible PLC program vulnerabilities arising at some approaches for programming of PLC are revealed.
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Original Russian Text © E.V. Kuzmin, V.A. Sokolov, 2012, published in Modelirovanie i Analiz Informatsionnykh Sistem, 2012, No. 4, pp. 25–36.
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Kuzmin, E.V., Sokolov, V.A. On construction and verification of PLC programs. Aut. Control Comp. Sci. 47, 443–451 (2013). https://doi.org/10.3103/S0146411613070110
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DOI: https://doi.org/10.3103/S0146411613070110