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Electronic Hardware for Fuzzy Computation

Electronic Hardware for Fuzzy Computation

Koldo Basterretxea, Inés del Campo
ISBN13: 9781605668581|ISBN10: 1605668583|ISBN13 Softcover: 9781616924478|EISBN13: 9781605668598
DOI: 10.4018/978-1-60566-858-1.ch001
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MLA

Basterretxea, Koldo, and Inés del Campo. "Electronic Hardware for Fuzzy Computation." Scalable Fuzzy Algorithms for Data Management and Analysis: Methods and Design, edited by Anne Laurent and Marie-Jeanne Lesot, IGI Global, 2010, pp. 1-30. https://doi.org/10.4018/978-1-60566-858-1.ch001

APA

Basterretxea, K. & del Campo, I. (2010). Electronic Hardware for Fuzzy Computation. In A. Laurent & M. Lesot (Eds.), Scalable Fuzzy Algorithms for Data Management and Analysis: Methods and Design (pp. 1-30). IGI Global. https://doi.org/10.4018/978-1-60566-858-1.ch001

Chicago

Basterretxea, Koldo, and Inés del Campo. "Electronic Hardware for Fuzzy Computation." In Scalable Fuzzy Algorithms for Data Management and Analysis: Methods and Design, edited by Anne Laurent and Marie-Jeanne Lesot, 1-30. Hershey, PA: IGI Global, 2010. https://doi.org/10.4018/978-1-60566-858-1.ch001

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Abstract

This chapter describes two decades of evolution of electronic hardware for fuzzy computing, and discusses the new trends and challenges that are currently being faced in this field. Firstly the authors analyze the main design approaches performed since first fuzzy chip designs were published and until the consolidation of reconfigurable hardware: the digital approach and the analog approach. Secondly, the evolution of fuzzy hardware based on reconfigurable devices, from traditional field programmable gate arrays to complex system-on-programmable chip solutions, is described and its relationship with the scalability issue is explained. The reconfigurable approach is completed by analyzing a cutting edge design methodology known as dynamic partial reconfiguration and by reviewing some evolvable fuzzy hardware designs. Lastly, regarding fuzzy data-mining processing, the main proposals to speed up data-mining workloads are presented: multiprocessor architectures, reconfigurable hardware, and high performance reconfigurable computing.

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