High Throughput Realization of a New Systolic Array based FFT using CORDIC

High Throughput Realization of a New Systolic Array based FFT using CORDIC

Gourav Jain, Shaik Rafi Ahamed
Copyright: © 2012 |Volume: 2 |Issue: 2 |Pages: 7
ISSN: 2156-1737|EISSN: 2156-1729|EISBN13: 9781466613423|DOI: 10.4018/ijmtie.2012040105
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MLA

Jain, Gourav, and Shaik Rafi Ahamed. "High Throughput Realization of a New Systolic Array based FFT using CORDIC." IJMTIE vol.2, no.2 2012: pp.53-59. http://doi.org/10.4018/ijmtie.2012040105

APA

Jain, G. & Ahamed, S. R. (2012). High Throughput Realization of a New Systolic Array based FFT using CORDIC. International Journal of Measurement Technologies and Instrumentation Engineering (IJMTIE), 2(2), 53-59. http://doi.org/10.4018/ijmtie.2012040105

Chicago

Jain, Gourav, and Shaik Rafi Ahamed. "High Throughput Realization of a New Systolic Array based FFT using CORDIC," International Journal of Measurement Technologies and Instrumentation Engineering (IJMTIE) 2, no.2: 53-59. http://doi.org/10.4018/ijmtie.2012040105

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Abstract

In this paper, the authors propose a new systolic array for radix-2, N-point discrete Fourier Transform (DFT) computation based on CORDIC (CO-ordinate Rotation Digital Computer). Complex multiplication can be done by this in a rather simple and elegant way. A CORDIC based multiplier less DFT architecture is designed in order to improve the performance of the system. It is able to provide two transforms per each clock cycle. The proposed design is well suited for high speed DSP-applications.

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