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Modeling Communication in Multi–Processor Systems–on–Chip Using Modular Connectors

Modeling Communication in Multi–Processor Systems–on–Chip Using Modular Connectors

Leonidas Tsiopoulos, Kaisa Sere, Juha Plosila
Copyright: © 2010 |Volume: 1 |Issue: 2 |Pages: 22
ISSN: 1947-3176|EISSN: 1947-3184|EISBN13: 9781609604387|DOI: 10.4018/jertcs.2010040102
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MLA

Tsiopoulos, Leonidas, et al. "Modeling Communication in Multi–Processor Systems–on–Chip Using Modular Connectors." IJERTCS vol.1, no.2 2010: pp.23-44. http://doi.org/10.4018/jertcs.2010040102

APA

Tsiopoulos, L., Sere, K., & Plosila, J. (2010). Modeling Communication in Multi–Processor Systems–on–Chip Using Modular Connectors. International Journal of Embedded and Real-Time Communication Systems (IJERTCS), 1(2), 23-44. http://doi.org/10.4018/jertcs.2010040102

Chicago

Tsiopoulos, Leonidas, Kaisa Sere, and Juha Plosila. "Modeling Communication in Multi–Processor Systems–on–Chip Using Modular Connectors," International Journal of Embedded and Real-Time Communication Systems (IJERTCS) 1, no.2: 23-44. http://doi.org/10.4018/jertcs.2010040102

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Abstract

Formal methods of concurrent programming can be used to develop and verify complex Multi–Processor Systems–On–Chip in order to ensure that these systems satisfy their functional and communication requirements. The authors use the Action Systems formalism and show how asynchronous communication of Multi–Processor Systems–on–Chip can be modeled using generic connectors composed out of simple channel components. The paper proposes a new approach to modeling generic and hierarchical connectors for handling the complexity of on–chip communication and data flow. The authors’ goal is to avoid overloaded bus–based architectures and give a distributed framework. A case study presents the authors’ modeling methodology.

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