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A Survey of FPGA Dynamic Reconfiguration Design Methodology and Applications

A Survey of FPGA Dynamic Reconfiguration Design Methodology and Applications

Ming Liu, Zhonghai Lu, Wolfgang Kuehn, Axel Jantsch
Copyright: © 2012 |Volume: 3 |Issue: 2 |Pages: 17
ISSN: 1947-3176|EISSN: 1947-3184|EISBN13: 9781466612006|DOI: 10.4018/jertcs.2012040102
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MLA

Liu, Ming, et al. "A Survey of FPGA Dynamic Reconfiguration Design Methodology and Applications." IJERTCS vol.3, no.2 2012: pp.23-39. http://doi.org/10.4018/jertcs.2012040102

APA

Liu, M., Lu, Z., Kuehn, W., & Jantsch, A. (2012). A Survey of FPGA Dynamic Reconfiguration Design Methodology and Applications. International Journal of Embedded and Real-Time Communication Systems (IJERTCS), 3(2), 23-39. http://doi.org/10.4018/jertcs.2012040102

Chicago

Liu, Ming, et al. "A Survey of FPGA Dynamic Reconfiguration Design Methodology and Applications," International Journal of Embedded and Real-Time Communication Systems (IJERTCS) 3, no.2: 23-39. http://doi.org/10.4018/jertcs.2012040102

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Abstract

FPGA Dynamic Partial Reconfiguration (DPR or PR) technology has emerged and become gradually mature in the recent years. It provides the Time-Division Multiplexing (TDM) capability in utilizing on-chip resources and leads to significant benefits in comparison with conventional static designs. However, the partially reconfigurable design process features additional complexity and technical requirements to the FPGA developers. Hence, PR design approaches are being widely explored and investigated to systematize the development methodology and ease the designers. In this paper, the authors collect several research and engineering projects in this area and present a survey of the design methodology and applications of PR. Research aspects are discussed in various hardware/software layers.

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