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Intrinsic Evolvable Hardware Used for Fault Tolerance Systems

Intrinsic Evolvable Hardware Used for Fault Tolerance Systems

Laurenţiu Ionescu, Alin Mazare, Gheorghe Şerban
Copyright: © 2012 |Volume: 3 |Issue: 2 |Pages: 38
ISSN: 1947-9344|EISSN: 1947-9352|EISBN13: 9781466613867|DOI: 10.4018/joci.2012040102
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MLA

Ionescu, Laurenţiu, et al. "Intrinsic Evolvable Hardware Used for Fault Tolerance Systems." IJOCI vol.3, no.2 2012: pp.43-80. http://doi.org/10.4018/joci.2012040102

APA

Ionescu, L., Mazare, A., & Şerban, G. (2012). Intrinsic Evolvable Hardware Used for Fault Tolerance Systems. International Journal of Organizational and Collective Intelligence (IJOCI), 3(2), 43-80. http://doi.org/10.4018/joci.2012040102

Chicago

Ionescu, Laurenţiu, Alin Mazare, and Gheorghe Şerban. "Intrinsic Evolvable Hardware Used for Fault Tolerance Systems," International Journal of Organizational and Collective Intelligence (IJOCI) 3, no.2: 43-80. http://doi.org/10.4018/joci.2012040102

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Abstract

The main target of this chapter is to present the intrinsic evolvable hardware structures: concept, design and applications. The intrinsic evolvable hardware structures concept join more research areas like: bio – inspired searching methods (evolutionary algorithms), optimization of algorithms by parallel processing and reconfigurable circuits. First, a general overview about intrinsic evolvable hardware structure is presented. The intrinsic evolvable hardware structure consists in two main modules: hardware genetic algorithm and dynamic reconfigurable circuit. In a particular application, the hardware genetic algorithm searches the configuration that makes the reconfigurable circuit to correctly respond to application requirements. In a background section are presented the genetic algorithm concept as a bio-inspired search solution, the hardware reconfiguration concept with sub areas classifications and the research directions in the evolvable hardware structures areas with application examples. In the first part of the main section are presented the design solutions for hardware implementation of genetic algorithm. Then the solutions are presented for the reconfigurable circuit design and interconnection between reconfigurable circuit and hardware genetic algorithm. Finally, are presented several applications that illustrate the usefulness of the intrinsic evolvable hardware structure. Intrinsic evolvable hardware can be used as a method of resolving faults occurring in some parts of the digital circuit.

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