Authors:
Josef Grus
1
;
2
;
Zdeněk Hanzálek
2
;
Dalibor Barri
3
and
Patrik Vacula
3
Affiliations:
1
DCE, FEE, Czech Technical University in Prague, Czech Republic
;
2
IID, CIIRC, Czech Technical University in Prague, Czech Republic
;
3
STMicroelectronics, Prague, Czech Republic
Keyword(s):
Placement, Combinatorial Optimization, Analog Integrated Circuit, Rectangle Packing.
Abstract:
Due to its diversity, the physical design of the Analog and Mixed-Signal Integrated Circuits is not as automated as the physical design of digital Integrated Circuits. The placement process is one of the critical steps of the physical design, and automating it would significantly shorten the design time. We formulate the placement process using an Integer Linear Programming approach, with features to support a specific semiconductor technology. We include an enumeration of possible variants of the circuit’s topological structures, which are afterward considered during optimization. We use the Gurobi solver to minimize both the approximate wire length and the placement area. The results were evaluated by layout design experts and compared with manual designs. We also utilize a graph drawing-based method to generate an initial feasible solution to warm start the Integer Linear Programming solver, which noticeably improves the performance and shortens the computation time (5x to 15x), a
nd makes the approach applicable even for larger problem instances containing 100 independent elements. Experiments performed on real-life industrial problem instances show that our graph drawing-enhanced approach can produce high-quality placement in a much shorter time than the designers need.
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