Embedded SW in Digital AM-FM Chipset

Abstract

DRM, the new standard for digital radio broadcasting in AM band requires integrated devices for radio receivers at low cost and very low power consumption. A chipset is currently designed based upon an ARM9 multi-core architecture. This paper introduces the application itself, the HW architecture of the SoC and the SW architecture which includes physical layer, receiver management, the application layer and the global scheduler based on a real-time OS. Then, the paper presents the HW/SW partitioning and SW breakdown between the various processing cores. The methodology used in the project to develop, validate and integrate the SW covering various methods such as simulation, emulation and co-validation is described. Key points and critical issues are also addressed.

One of the challenges is to integrate the whole receiver in the mono-chip with respect to the real-time constraints linked to the audio services.