Abstract
In this article, we address the problem of statically determining an approximation of the communication topology of concurrent programs. These programs may contain dynamic process and channel creations and may communicate channel names as well as functions, possibly containing other communications.
We introduce a control flow analysis which builds finite state automata to improve its precision. The method is twofold. First, we build an automaton for each process in the concurrent system yielding an approximation of how the synchronizations realized by the sequential components are ordered. Second, we extract the communication topology from a reduced product automaton, which size is polynomial in the size of the original program. This analysis was implemented and we apply it to the verification of a circuit allocation mechanism.
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Martel, M., Gengler, M. (2000). Communication Topology Analysis for Concurrent Programs. In: Havelund, K., Penix, J., Visser, W. (eds) SPIN Model Checking and Software Verification. SPIN 2000. Lecture Notes in Computer Science, vol 1885. Springer, Berlin, Heidelberg. https://doi.org/10.1007/10722468_16
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DOI: https://doi.org/10.1007/10722468_16
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