Abstract
Simultaneous Multithreaded (SMT) processors improve the instruction throughput by allowing fetching and running instructions from several threads simultaneously at a single cycle. With the pipeline deepen and issue widths increase, the branch predictor plays a more important role in improving the performance of an SMT processor. Many predictors based on neural network, especially on perceptron, are proposed to provide a more accurate dynamic branch prediction than before in the literature. In this paper, we propose an effective method to improve the accuracy of a perceptron predictor through correlating data values in SMT processors. The key idea is using a dynamic bias input, which comes from some information independent on the branch histories (data values for example), to realize the objective of improving accuracy. The implementation of our method is simple, and the predicting latency is not lengthened. Execution-driven simulation results show that our method works successfully on improving the accuracy of a perceptron predictor and increasing the overall instruction throughput of SMT processors.
This is a preview of subscription content, log in via an institution to check access.
Preview
Unable to display preview. Download preview PDF.
Similar content being viewed by others
References
Tullsen, D.M., Eggers, S.J., Levy, H.M., et al.: Simultaneous Multithreading: Maximizing On-Chip Parallelism. In: 22nd Annual International Symposium on Computer Architecture (1995)
Tullsen, D.M.: Exploiting Choice: Instruction Fetch and Issue on a Implementable Simultaneous Multithreading Processor. In: 23nd Annual International Symposium on Computer Architecture (May 1996)
Calder, B., Grunwald, D., Jones, M., et al.: Evidence-based Static Branch Prediction Using Machine Learning. ACM Transactions on Programming Languages and Systems 19(1) (1997)
Jiménez, D., Lin, C.: Neural Methods for Dynamic Branch Prediction. ACM Transactions on Computer System 20, 369–397 (2002)
Jiménez, D.: Fast Path-Based Neural Branch Prediction. In: 36th International Symposium on Microarchitecture, p. 243 (2003)
Seznec, A.: Revisiting the Perceptron Predictor. Technical Report, IRISA (May 2004)
Sato, T.: First Step to Combining Control and Data Speculation. In: IWIA 1998, October 1998, pp. 53–60 (1998)
Gonzalez, J., Gonzalez, A.: Control-Flow Speculation through Value Prediction. IEEE Transaction on Computer 50, 1362–1376 (2001)
He, L., Liu, Z.: A New Value Based Branch Predictor for SMT Processors. In: IASTED PDCS 2004, November 2004, pp. 775–783 (2004)
Tullsen, D.M.: Simulation and Modeling of a Simultaneous Multithreading Processor. In: 22nd Annul Computer Measurement Group Conference (December 1996)
Hu, S., Bhargava, R., John, L.K.: The Role of Return Value Prediction in Exploiting Speculative Method-level Parallelism. Journal of Instruction-Level Parallelism 5, 1–21 (2003)
Seznec, A.: The O-GEHL Branch Predictor. Championship Branch Prediction. The Journal of Instruction Level Parallelism (2004), http://www.jilp.org/cbp
Henning, J.L.: SPEC CPU 2000: Measuring CPU Performance in the New Millennium. IEEE Computer (July 2000)
Sherwood, T., Perelman, E., Hamerly, G., Calder, B.: Automatically Characterizing Large Scale Program Behavior. 10th. In: 10th ASPLOS (October 2002)
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2005 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
He, L., Liu, Z. (2005). Improving Accuracy of Perceptron Predictor Through Correlating Data Values in SMT Processors. In: Wang, J., Liao, XF., Yi, Z. (eds) Advances in Neural Networks – ISNN 2005. ISNN 2005. Lecture Notes in Computer Science, vol 3498. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11427469_151
Download citation
DOI: https://doi.org/10.1007/11427469_151
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-25914-5
Online ISBN: 978-3-540-32069-2
eBook Packages: Computer ScienceComputer Science (R0)