Abstract
Address-Event-Representation (AER) is a communication protocol for transferring images between chips, originally developed for bio-inspired image processing systems. Such systems may consist of a complicated hierarchical structure with many chips that transmit images among them in real time, while performing some processing (for example, convolutions). In developing AER based systems it is very convenient to have available some kind of means of generating AER streams from on-computer stored images. In this paper we present a hardware method for generating AER streams in real time from a sequence of images stored in a computer’s memory. The Kolmogorov-Smirnov test has been applied to quantify that this method follows a Poisson distribution of the spikes. A USB-AER board and a PCI-AER board, developed by our RTCAR group, have been used.
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Sivilotti, M.: Wiring Considerations in analog VLSI Systems with Application to Field-Programmable Networks, Ph.D. Thesis, California Institute of Technology, Pasadena CA (1991)
Serrano-Gotarredona, T., Andreou, A.G., Linares-Barranco, B.: AER Image Filtering Architecture for Vision-Processing Systems. IEEE Transactions on Circuits and Systems. Fundamental Theory and Applications 46(9) (September 1999)
Cohen, A., Douglas, R., Koch, C., Sejnowski, T., Shamma, S., Horiuchi, T., Indiveri, G.: Report to the National Science Foundation: Workshop on Neuromorphic Engineering, Telluride, Colorado, USA, (June-July 2001), http://www.ini.unizh.ch/telluride
Boahen, K.A.: Communicating Neuronal Ensembles between Neuromorphic Chips. In: Neuromorphic Systems. Kluwer Academic Publishers, Boston (1998)
Mortara, A., Vittoz, E.A., Venier, P.: A Communication Scheme for Analog VLSI Perceptive Systems. IEEE Journal of Solid-State Circuits 30(6), 660–669 (1995)
Mahowald, M.: VLSI Analogs of Neuronal Visual Processing: A Synthesis of Form and Function. PhD. Thesis, California Institute of Technology Pasadena, California (1992)
L’Ecuyer, P., Panneton, F.: A New Class of Linear Feedback Shift Register Generators. In: Proceedings of the 2000 Winter Simulation Conference (2000)
Linear Feedback Shift Register V2.0. Xilinx Inc. (October 4, 2001), http://www.xilinx.com/ipcenter
Linares-Barranco, A.: Estudio y evaluación de interfaces para la conexión de sistemas neuromórficos mediante Address- Event-Representation. Ph.D. Thesis, University of Seville, Spain (2003), http://www.atc.us.es/alinares
Linares-Barranco, A., Senhadji-Navarro, R., García-Vargas, I., Gómez-Rodríguez, F., Jimenez, G., Civit, A.: Synthetic Generation of Address-Event for Real-Time Image Processing. In: ETFA 2003, vol. 2, pp. 462–467 (2003)
Linares-Barranco, A., Jimenez-Moreno, G., Civit-Ballcels, A., Linares-Barranco, B.: On Synthetic AER Generation. In: ISCAS 2004, Vancouver, Canada (May 2004)
Dayan, P., Abbot, L.: Theoretical Neuroscience. MIT Press, Cambridge (2001)
Rieke, F., Worland, D., de Ruyter van Steveninck, R., Bialek, W.: Spikes: Exploring the Neural Code. The MIT Press, Cambridge (1999)
Cogdell, J.R.: Modeling Random Systems. Pearson Prentice Hall, London (2004)
Dante, V., Del Giudice, P., Whatley, A.M.: PCI-AER Hardware and Software for Interfacing to Address-Event Based Neuromorphic Systems. The Neuromorphic Engineer 2(1), 5–6 (2005) (in press)
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Linares-Barranco, A., Oster, M., Cascado, D., Jiménez, G., Civit, A., Linares-Barranco, B. (2005). Inter-spike-intervals Analysis of Poisson Like Hardware Synthetic AER Generation. In: Cabestany, J., Prieto, A., Sandoval, F. (eds) Computational Intelligence and Bioinspired Systems. IWANN 2005. Lecture Notes in Computer Science, vol 3512. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11494669_59
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DOI: https://doi.org/10.1007/11494669_59
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-26208-4
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