Abstract
Platform architectures for modern embedded systems are increasingly heterogeneous and parallel. Early design decisions, such as the allocation of hardware resources and the partitioning of functionality onto architecture building blocks, become even more complex and important for the resulting design quality. To effectively support designers during the concept phase we base our design flow SystemQ on queuing systems. We show how by starting with a performance model the system’s behavior and structure can be refined systematically. SystemQ is implemented in SystemC and seamlessly supports the refinement of SystemQ models down to established transaction and RT levels. Compared with existing approaches, SystemQ’s formalism exposes transaction scheduling as one key aspect of the system’s performance and allows the modeling of time and resource workload-dependent behavior. A case study underpins the usefulness of SystemQ’s approach by evaluating a network access platform at three refinement levels.
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Keutzer, K., Malik, S., Newton, A.R., et al.: System level design: Orthogonalization of concerns and platform-based design. IEEE Transactions on CAD 19 (2000)
de Kock, E.A., Smits, W.J.M., van der Wolf, P., et al.: YAPI: Application modeling for signal processing systems. In: DAC (2000)
Kleinrock, L.: Queueing Systems, Volume I: Theory. John Wiley & Sons, Chichester (1975)
Baskett, F., Chandy, K.M., Muntz, R.R., Palacios, F.G.: Open, closed, and mixed networks of queues with different classes of customers. Journal of the ACM 22 (1975)
Grötker, T., Liao, S., Martin, G., Swan, S.: System Design with SystemC. Kluwer, Dordrecht (2002)
Balarin, F., Watanabe, Y., Hsieh, H., et al.: Metropolis: An integrated electronic system design environment. IEEE Computer 36 (2003)
Pimentel, A., Hertzberger, L., Lieverse, P., et al.: Exploring embedded-systems architectures with Artemis. IEEE Computer 34 (2001)
Kohler, E., Morris, R., Chen, B., et al.: The Click modular router. ACM Transactions on Computer Systems 18 (2000)
Paulin, P., Pilkington, C., Bensoudane, E.: StepNP: A system-level exploration platform for network processors. IEEE Design & Test of Computers 19 (2002)
Wieferink, A., Kogel, T., Leupers, R., et al.: A system level processor/communication co-exploration methodology for multi-processor SoC platforms. In: DATE (2004)
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© 2005 Springer-Verlag Berlin Heidelberg
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Sonntag, S., Gries, M., Sauer, C. (2005). SystemQ: A Queuing-Based Approach to Architecture Performance Evaluation with SystemC. In: Hämäläinen, T.D., Pimentel, A.D., Takala, J., Vassiliadis, S. (eds) Embedded Computer Systems: Architectures, Modeling, and Simulation. SAMOS 2005. Lecture Notes in Computer Science, vol 3553. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11512622_46
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DOI: https://doi.org/10.1007/11512622_46
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-26969-4
Online ISBN: 978-3-540-31664-0
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