Abstract
This paper describes a functionality-based instruction-level power analysis model, which aims at reducing workload of computing inter-instruction power and keeping the convenience to observe necessary parameters from a source-code description. The model treats the total power as the sum of basic power of individual functional component and switching power of consecutive components pairs. To get the switching power, the switching activities between two functional components are treated as one changing from working state to sleeping state and the other from sleeping state to working state. NOP instructions are used to model transitions between the two states. The model is experimentally validated on a wide range of embedded software routines. Experiments show that our model is within 95% accuracy on the average, and can reduce the workload from a complexity of O(n 2), which is the workload of traditional instruction-level energy estimation techniques, to a complexity of O(n).
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© 2005 Springer-Verlag Berlin Heidelberg
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Chen, J., Wang, Sy., Dong, Y., Dai, Gl., Yang, Y. (2005). A Functionality Based Instruction Level Software Power Estimation Model for Embedded RISC Processors. In: Wu, Z., Chen, C., Guo, M., Bu, J. (eds) Embedded Software and Systems. ICESS 2004. Lecture Notes in Computer Science, vol 3605. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11535409_64
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DOI: https://doi.org/10.1007/11535409_64
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-28128-3
Online ISBN: 978-3-540-31823-1
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