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An Evolvable Image Filter: Experimental Evaluation of a Complete Hardware Implementation in FPGA

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Evolvable Systems: From Biology to Hardware (ICES 2005)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 3637))

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Abstract

This paper describes an evolvable image filter which is completely implemented in a field programmable gate array. The proposed system is able to evolve an image filter in a few seconds if corrupted and original images are supplied by user. The architecture is generic and can easily be modified to realize other evolvable systems. COMBO6 card with Xilinx Virtex xc2v3000 FPGA is used as a target platform.

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Author information

Authors and Affiliations

  1. Faculty of Information Technology, Brno University of Technology, Božetěchova 2, 612 66, Brno, Czech Republic

    Tomáš Martínek & Lukáš Sekanina

Authors
  1. Tomáš Martínek
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  2. Lukáš Sekanina
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Editor information

Editors and Affiliations

  1. Dept. of Electronic Engineering, Technical University of Catalunya, Campus Nord, Building C4, c/Jordi Girona 1-3, P.O. Box, 08034, Barcelona, Spain

    J. Manuel Moreno

  2. Department of Electronic Engineering, Technical University of Catalunya, Campus Nord, Building C4, c/Jordi Girona 1-3, 08034, Barcelona, Spain

    Jordi Madrenas  & Jordi Cosp  & 

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© 2005 Springer-Verlag Berlin Heidelberg

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Martínek, T., Sekanina, L. (2005). An Evolvable Image Filter: Experimental Evaluation of a Complete Hardware Implementation in FPGA. In: Moreno, J.M., Madrenas, J., Cosp, J. (eds) Evolvable Systems: From Biology to Hardware. ICES 2005. Lecture Notes in Computer Science, vol 3637. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11549703_8

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  • DOI: https://doi.org/10.1007/11549703_8

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-28736-0

  • Online ISBN: 978-3-540-28737-7

  • eBook Packages: Computer ScienceComputer Science (R0)

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