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A Study on Enhanced Dynamic Signature Verification for the Embedded System

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Brain, Vision, and Artificial Intelligence (BVAI 2005)

Part of the book series: Lecture Notes in Computer Science ((LNIP,volume 3704))

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Abstract

This paper is a research on the dynamic signature verification of error rate which are false rejection rate and false acceptance rate, the size of signature verification engine, the size of the characteristic vectors of a signature, the ability to distinguish similar signatures, and so on. We suggest feature extraction and comparison method of the signature verification. Also, we have implemented our system with Java technology for more efficient user interfaces and various OS Platforms and embedded system.

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Author information

Authors and Affiliations

  1. School of Computer, Youngsan University, Korea

    Jin Whan Kim & Hyuk Gyu Cho

  2. Dept. of Computer Science, Pusan National University, Korea

    Eui Young Cha

Authors
  1. Jin Whan Kim
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  2. Hyuk Gyu Cho
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  3. Eui Young Cha
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Editor information

Editors and Affiliations

  1. Istituto di Cibernetica “Eduardo Caianiello”, CNR, Pozzuoli (NA), Italy

    Massimo De Gregorio

  2. Istituto di Cibernetica “E. Caianiello” del CNR, Via Campi Flegrei, 34, 80078, Pozzuoli (NA), Italy

    Vito Di Maio

  3. Institute of Cybernetics “E. Caianiello”, CNR, Pozzuoli, (Naples), Italy

    Maria Frucci

  4. Istituto di Cibernetica “Eduardo Caianiello”, CNR, Pozzuoli, Italy

    Carlo Musio

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Kim, J.W., Cho, H.G., Cha, E.Y. (2005). A Study on Enhanced Dynamic Signature Verification for the Embedded System. In: De Gregorio, M., Di Maio, V., Frucci, M., Musio, C. (eds) Brain, Vision, and Artificial Intelligence. BVAI 2005. Lecture Notes in Computer Science, vol 3704. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11565123_42

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  • DOI: https://doi.org/10.1007/11565123_42

  • Publisher Name: Springer, Berlin, Heidelberg

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