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The Design Space of CMP vs. SMT for High Performance Embedded Processor

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Embedded Software and Systems (ICESS 2005)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 3820))

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Abstract

In embedded world, many researchers have begun to examine Simultaneous Multithreading (SMT) and Chip Multiprocessing (CMP) for various demands. SMT and CMP both make a chip to achieve greater throughput. But the power, chip size and thermal features are also important for embedded system. In this paper we compare the design space of both architecture. As simulation results shown, although extending wide-issue processor into SMT has the advantage of small design changes, high hardware resource efficiency and high throughput, CMP presents better scalability in raw performance and power metric under heavy multithreaded workload than SMP. CMP integrates several similar processor in a single chip, so it can’t uses the chip area efficiently like SMT. And the chip area limits will prevent the CMP from equipping a large L2 cache, which will hurt the performance of memory-bound application. The evaluation also points out the design problem and possible solution for power, chip size and thermal efficiency in CMP and SMT.

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© 2005 Springer-Verlag Berlin Heidelberg

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Tang, Y., Deng, K., Zhou, X. (2005). The Design Space of CMP vs. SMT for High Performance Embedded Processor. In: Yang, L.T., Zhou, X., Zhao, W., Wu, Z., Zhu, Y., Lin, M. (eds) Embedded Software and Systems. ICESS 2005. Lecture Notes in Computer Science, vol 3820. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11599555_6

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  • DOI: https://doi.org/10.1007/11599555_6

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-30881-2

  • Online ISBN: 978-3-540-32297-9

  • eBook Packages: Computer ScienceComputer Science (R0)

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