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A Real-Time Large Disparity Range Stereo-System Using FPGAs

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Computer Vision – ACCV 2006 (ACCV 2006)

Part of the book series: Lecture Notes in Computer Science ((LNIP,volume 3852))

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Abstract

In this paper, we discuss the design and implementation of a Field-Programmable Gate Array (FPGA) based stereo depth measurement system that is capable of handling a very large disparity range. The system performs rectification of the input video stream and a left-right consistency check to improve the accuracy of the results and generates subpixel disparities at 30 frames/second on 480 × 640 images. The system is based on the Local Weighted Phase-Correlation algorithm [9] which estimates disparity using a multi-scale and multi-orientation approach. Though FPGAs are ideal devices to exploit the inherent parallelism in many computer vision algorithms, they have a finite resource capacity which poses a challenge when adapting a system to deal with large image sizes or disparity ranges. In this work, we take advantage of the temporal information available in a video sequence to design a novel architecture for the correlation unit to achieve correlation over a large range while keeping the resource utilisation very low as compared to a naive approach of designing a correlation unit in hardware.

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© 2006 Springer-Verlag Berlin Heidelberg

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Masrani, D.K., MacLean, W.J. (2006). A Real-Time Large Disparity Range Stereo-System Using FPGAs. In: Narayanan, P.J., Nayar, S.K., Shum, HY. (eds) Computer Vision – ACCV 2006. ACCV 2006. Lecture Notes in Computer Science, vol 3852. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11612704_5

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  • DOI: https://doi.org/10.1007/11612704_5

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-31244-4

  • Online ISBN: 978-3-540-32432-4

  • eBook Packages: Computer ScienceComputer Science (R0)

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