Abstract
It is increasingly popular to adopt DSM systems to maximize parallelism beyond the limits of SMP. Wherein, a proper cache coherence scheme should be efficient at the memory overhead for maintaining the directories because of its significant impact on overall performance of the system. In this paper, we propose a new hybrid directory scheme which reduces the memory overhead of the directory and improves the memory access time by using our new hybrid directory scheme. We evaluate the performance of our proposed scheme by running six applications on an execution-driven simulator (RSIM). The simulation results show that the performance of a system with hybrid directory can achieve close to that of a multiprocessor with bit-vector directory.
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References
Eggers, S.J., Katz, R.H.: Evaluating the Performance of Four Snooping Cache Coherency Protocols. In: Proc. of the 16th Annual International Symposium on Computer Architecture (1989)
Lenoski, D., Laudon, J.: The directory-based cache coherence protocol for the DASH multiprocessor. In: Proc. of the 17th annual international symposium on Computer Architecture (1990)
Censier, L.M., Feautrier, P.: A New Solution to Coherence Problems in Multi-cache Systems. IEEE Transactions on Computers C-27(12), 1112–1118 (1978)
Laudon, J., Lenoski, D.: The SGI Origin: A ccNUMA Highly Scalable Server. In: Proceedings of the 24th international Symposium on Computer Architecture (1997)
Silicon Graphics Inc.: http://www.sgi.com/products/servers/origin/3000/overview.html
Agarwal, A., Simoni, R.: An Evaluation of Directory Schemes for Cache Coherence. In: Proc. of the 15th Znt. Sym. On Computer Architecture, pp. 280–289 (1988)
Acacio, et al.: A New Scalable Directory Architecture for Large-Scale Multiprocessors. In: Proceedings of the 7th International Symposium on High-Performance Computer Architecture, pp. 97–106 (2001)
Chang, Bhuyan: An Efficient Hybrid Cache Coherence Protocol for Shared Memory Multiprocessors. IEEE Transactions on Computers 48(3), 352–360 (1999)
Deng, R., Xie, L.: Sharing Pattern of Shared Data in Multiprocessors. Computer Engineering and Science 20(A1), 66–69 (1998)
Singh, J.P., et al.: SPLASH: Stanford Parallel Applications for Shared-Memory. Computer Architecture News 20, 5–44 (1992)
Woo, S.C., et al.: SPLASH-2 Programs: Characterization and Methodological Considerations. In: Proc. of the 22nd Int’l Symposium on Computer Architecture, pp. 24–36 (1995)
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© 2006 Springer-Verlag Berlin Heidelberg
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Pan, G., Xie, L., Dou, Q., He, E. (2006). A New Hybrid Directory Scheme for Shared Memory Multi-processors. In: Grigoriev, D., Harrison, J., Hirsch, E.A. (eds) Computer Science – Theory and Applications. CSR 2006. Lecture Notes in Computer Science, vol 3967. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11753728_50
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DOI: https://doi.org/10.1007/11753728_50
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-34166-6
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