Skip to main content
Springer Nature Link
Log in

FPGA Implementation of a Neural Network for Character Recognition

  • Conference paper
Advances in Neural Networks - ISNN 2006 (ISNN 2006)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 3973))

Included in the following conference series:

  • 1808 Accesses

Abstract

Neural Networks are usually implemented in software on sequential machines but when implemented in hardware, they are extremely fast due to the massive parallelism inherent in the hardware devices. Implementation of Neural Networks in Programmable Logic Devices such as FPGAs (Field Programmable Gate Arrays) gives us more flexibility since these devices are reconfigurable and their design can be altered whenever needed. The design proposed in this paper shows the implementation of perceptron neural network in FPGAs for the character recognition problem. The characters here are the English language alphabets which are input to the network and after training; they are tested for recognition. Each alphabet is tested for three different fonts. After implementation, the simulations are done and performance issues of the design are analyzed.The post-layout simulation gives excellent results even if some noise is introduced to the input patterns.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Log in via an institution

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

Similar content being viewed by others

References

  1. Ferrucci, A.: ACME: A Field Programmable Gate Array Implementation of a Self adapting and Scalable Connectionist Network. Masters Thesis, University of California, Santa Cruz (1994)

    Google Scholar 

  2. Fausett, L.V.: Fundamentals of Neural Networks: Architectures, Algorithms and Applications. Prentice-Hall International, Englewood Cliffs (1994)

    MATH  Google Scholar 

  3. Khan, A.H.: Multiplier-free Feedforward Networks. In: Proceedings of the IEEE International Joint Conference on Neural Networks (IJCNN), Honolulu, Hawaii, vol. 3, pp. 2698–2703 (2002)

    Google Scholar 

  4. Khan, F.A.: Implementation of Neural Network in FPGAs. Masters Thesis, GIK Institute of Engineering Sciences and Technology, Topi, Pakistan (2003)

    Google Scholar 

  5. Liao, Y.: Neural Networks in Hardware: A Survey. Report, Department of Computer Science. University of California, Davis CA (2001)

    Google Scholar 

  6. Ossoinig, H.: Design and FPGA-Implementation of a Neural Network. Masters Thesis, Institute for Technical Informatics, Graz University of Technology, Austria (1995)

    Google Scholar 

  7. Seiffert, U.: Artificial Neural Networks on Massively Parallel Computer Hardware. In: Proceedings of European Symposium on Artificial Neural Networks, Bruges, Belgium (2002)

    Google Scholar 

  8. Matlab available at MathWorks Homepage, http://www.mathworks.com/products/matlab/

  9. Altera Homepage, http://www.altera.com/

  10. Verilog HDL Homepage, http://www.verilog.com/

Download references

Author information

Authors and Affiliations

  1. Department of Computer Engineering, Cheju National University, Jeju, 690-756, Korea

    Farrukh A. Khan & Wang-Cheol Song

  2. Department of Electrical Engineering, Texas A&M University, College Station, TX, USA

    Momin Uppal

  3. Department of Electronic Engineering, Cheju National University, Jeju, 690-756, Korea

    Min-Jae Kang

  4. Faculty of Computer Science and Engineering, GIK Institute, Topi, Pakistan

    Anwar M. Mirza

Authors
  1. Farrukh A. Khan
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Momin Uppal
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Wang-Cheol Song
    View author publications

    You can also search for this author in PubMed Google Scholar

  4. Min-Jae Kang
    View author publications

    You can also search for this author in PubMed Google Scholar

  5. Anwar M. Mirza
    View author publications

    You can also search for this author in PubMed Google Scholar

Editor information

Editors and Affiliations

  1. Department of Mechanical and Automation Engineering, The Chinese University of Hong Kong, Shatin, New Territories, Hong Kong, China

    Jun Wang

  2. Computational Intelligence Laboratory, School of Computer Science and Engineering, University of Electronic Science and Technology of China, 610054, Chengdu, P.R. China

    Zhang Yi

  3. Department of Electrical Engineering, University of Louisville, 40292, Louisville, KY, U.S.A

    Jacek M. Zurada

  4. Laboratory for Computational Biology, Shanghai Center for Systems Biomedicine, 800 Dong Chuan Rd, 200240, Shanghai, China

    Bao-Liang Lu

  5. School of Electrical and Electronic Engineering, University of Manchester, UK

    Hujun Yin

Rights and permissions

Reprints and permissions

Copyright information

© 2006 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Khan, F.A., Uppal, M., Song, WC., Kang, MJ., Mirza, A.M. (2006). FPGA Implementation of a Neural Network for Character Recognition. In: Wang, J., Yi, Z., Zurada, J.M., Lu, BL., Yin, H. (eds) Advances in Neural Networks - ISNN 2006. ISNN 2006. Lecture Notes in Computer Science, vol 3973. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11760191_197

Download citation

  • DOI: https://doi.org/10.1007/11760191_197

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-34482-7

  • Online ISBN: 978-3-540-34483-4

  • eBook Packages: Computer ScienceComputer Science (R0)

Publish with us

Policies and ethics