Abstract
In this paper, we present an evolutionary algorithm application to partitioning VLSI circuits on subcircuits with minimal number of connections between them. The algorithm is characterized by a multi-layer chromosome structure. Due to this structure, the partition of circuits is possible without applying a repair mechanism in the algorithm. The test circuits chosen from literature and created randomly are partitioned using proposed method. Results obtained by this method are compared with results obtained using a traditional Kernighan-Lin algorithm.
This work was supported by the Polish Ministry of Scientific Research and Information Technology (MNiI) under Grant No. 3 T11B 025 29.
Preview
Unable to display preview. Download preview PDF.
Similar content being viewed by others
References
Kozieł, S.: Evolutionary algorithms and their applications to the optimisation and modelling of the analogue electronic circuits, Ph. D. Thesis, Technical University of Gdańsk, Department of Electronics, Telecommunications, and Computer Science (1999)
Sait, S.M., Youssef, H.: VLSI physical design automation. Theory and practise. IEEE Press, New York (1995)
Chen, Y.P., Wang, T.C., Wong, D.F.: A Graph partitioning problem for multiple-chip design. In: Proceedings ISCAS 1993, pp. 1778-1781 (1993)
Kernighan, B.W., Lin, S.: An efficient heuristic procedure for partitioning graphs. Bell System Technical Journal 49(2), 291–307 (1970)
Fiduccia, C.M., Mattheyses, R.M.: A linear time heuristic for improving network partitions. In: Proceedings of the ACM/IEEE Design Automation Conference, pp. 175–181.
Raman, S., Patnaik, L.M.: Performance-Driven MCM Partitioning Through an Adaptive Genetic Algorithm. IEEE Transaction on VLSI Systems 4(4) (December 1996)
Vemuri, R.: Genetic algorithms for MCM partitioning. Electronic Letters 30(16), 1270–1272 (1994)
Słowik, A., Białko, M.: Modified Version of Roulette Selection for Evolution Algorithm - The Fan Selection. In: Rutkowski, L., Siekmann, J.H., Tadeusiewicz, R., Zadeh, L.A. (eds.) ICAISC 2004. LNCS (LNAI), vol. 3070, pp. 474–479. Springer, Heidelberg (2004)
Rutkowski, J., Zieliński, Ł : Using evolutionary techniques for chosen optimalization problems related to analog circuits design. In: Proceedings of ECCTD 2003 Conference (2003)
Słowik, A., Białko, M.: Design and Optimization of Combinational Digital Circuits Using Modified Evolutionary Algorithm. In: Rutkowski, L., Siekmann, J.H., Tadeusiewicz, R., Zadeh, L.A. (eds.) ICAISC 2004. LNCS (LNAI), vol. 3070, pp. 468–473. Springer, Heidelberg (2004)
Goldberg, D.E., Lingle, R.: Alleles, Loci, and the TSP. In: Proceedings of the First International Conference on Genetic Algorithms, pp. 154–159. Lawrence Erlbaum Associates, Hillsdale (1985)
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2006 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Słowik, A., Białko, M. (2006). Partitioning of VLSI Circuits on Subcircuits with Minimal Number of Connections Using Evolutionary Algorithm. In: Rutkowski, L., Tadeusiewicz, R., Zadeh, L.A., Żurada, J.M. (eds) Artificial Intelligence and Soft Computing – ICAISC 2006. ICAISC 2006. Lecture Notes in Computer Science(), vol 4029. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11785231_50
Download citation
DOI: https://doi.org/10.1007/11785231_50
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-35748-3
Online ISBN: 978-3-540-35750-6
eBook Packages: Computer ScienceComputer Science (R0)