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Hardware-Based IP Lookup Using n-Way Set Associative Memory and LPM Comparator

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Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS 2006)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 4017))

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Abstract

IP lookup process becomes the bottleneck of packet transmission as IP traffic increases. Hardware-based IP lookup is desirable for high-speed router. However, the IP lookup schemes using an index-based table are not efficient due to heavy prefix expansion. In this paper, efficient hardware-based IP lookup schemes using n-way set associative memory and a LPM comparator is proposed. It reduces memory requirements to about 50% or below compared with previous scheme and provides faster updating speed. It also completes an IP routing lookup with two memory accesses.

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© 2006 Springer-Verlag Berlin Heidelberg

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Yun, S. (2006). Hardware-Based IP Lookup Using n-Way Set Associative Memory and LPM Comparator. In: Vassiliadis, S., Wong, S., Hämäläinen, T.D. (eds) Embedded Computer Systems: Architectures, Modeling, and Simulation. SAMOS 2006. Lecture Notes in Computer Science, vol 4017. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11796435_41

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  • DOI: https://doi.org/10.1007/11796435_41

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-36410-8

  • Online ISBN: 978-3-540-36411-5

  • eBook Packages: Computer ScienceComputer Science (R0)

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