Abstract
This paper reports on the security of cryptographic algorithms implemented on FPGAs against power analysis attacks. We first present some improved experiments against these reconfigurable devices, due to an improved measurement process. Although it is usually believed that FPGAs are noisy targets for such attacks, it is shown that simple power consumption models can nearly perfectly correlate with actual measurements. Then, we evaluate how these correlation values depend on the resources used in the FPGAs. Finally, we investigate the possibility to counteract these attacks by using random pre-charges in the devices and determine how this technique allows a designer to increase the security of an implementation. These results confirm that side-channel attacks present a serious threat for most microelectronic devices, including FPGAs. To conclude, we discuss the security vs. efficiency tradeoffs.
Preview
Unable to display preview. Download preview PDF.
Similar content being viewed by others
References
Barreto, P., Rijmen, V.: The KHAZAD Legacy-Level Block Cipher, Submission to NESSIE project, available from: http://www.cosic.esat.kuleuven.ac.be/nessie/
Brier, E., Clavier, C., Olivier, F.: Correlation Power Analysis with a Leakage Model. In: Joye, M., Quisquater, J.-J. (eds.) CHES 2004. LNCS, vol. 3156, pp. 16–29. Springer, Heidelberg (2004)
Buysschaert, P., De Mulder, E., Örs, S.B., Delmotte, P., Preneel, B., Vandenbosch, G., Verbauwhede, I.: Electromagnetic Analysis Attack on an FPGA Implementation of an Elliptic Curve Cryptosystem. In: The proceedings of EUROCON 2005 - The International Conference on Computer as a Tool, 4 pages. IEEE, Los Alamitos (2005)
Chari, S., Rao, J., Rohatgi, P.: Template Attacks. In: Kaliski Jr., B.S., Koç, Ç.K., Paar, C. (eds.) CHES 2002. LNCS, vol. 2523, pp. 13–28. Springer, Heidelberg (2003)
Fischer, V., Drutarovsky, M.: True Random Number Generator Embedded in Reconfigurable Hardware. In: Kaliski Jr., B.S., Koç, Ç.K., Paar, C. (eds.) CHES 2002. LNCS, vol. 2523, pp. 415–430. Springer, Heidelberg (2003)
Kocher, P., Jaffe, J., Jun, B.: Differential Power Analysis. In: Wiener, M.J. (ed.) CRYPTO 1999. LNCS, vol. 1666, pp. 398–412. Springer, Heidelberg (1999)
National Bureau of Standards, FIPS PUB 46, The Data Encryption Standard, Federal Information Processing Standard, NIST, U.S. Dept. of Commerce (January 1977)
National Bureau of Standards, FIPS 197, Advanced Encryption Standard, Federal Information Processing Standard, NIST, U.S. Dept. of Commerce (November 2001)
Malkin, T.G., Standaert, F.-X., Yung, M.: A Comparative Cost/Security Analysis of Fault Attack Countermeasures. In: The proceedings of FDTC 2005, Edinburgh, Scotland (September 2005)
Ors, S.B., Oswald, E., Preneel, B.: Power-Analysis Attacks on an FPGA – First Experimental Results. In: Cagnoni, S., Gottlieb, J., Hart, E., Middendorf, M., Raidl, G.R. (eds.) EvoIASP 2002, EvoWorkshops 2002, EvoSTIM 2002, EvoCOP 2002, and EvoPlan 2002. LNCS, vol. 2279, pp. 35–50. Springer, Heidelberg (2002)
Peeters, E., Standaert, F.-X., Quisquater, J.-J.: Power and Electromagnetic Analysis: Improved Model, Consequences and Comparisons. Integration, the VLSI Journal (to appear) (Spring 2006)
Rabaey, J.M.: Digital Integrated Circuits. Prentice Hall International, Englewood Cliffs (1996)
Shang, L., Kaviani, A., Bathala, K.: Dynamic Power Consumption in Virtex-2 FPGA Family. In: The proceedings of FPGA 2002, Monterey, California, USA, February 2002, pp. 157–164 (2002)
Standaert, F.-X., Ors, S.B., Preneel, B.: Power Analysis of an FPGA Implementation of Rijndael: Is Pipelining a DPA Countermeasure? In: Joye, M., Quisquater, J.-J. (eds.) CHES 2004. LNCS, vol. 3156, pp. 30–44. Springer, Heidelberg (2004)
Standart, F.-X., Peeters, E., Rouvroy, G., Quisquater, J.-J.: Power Analysis Attacks and Countermeasures of Field Programmable Gate Arrays: Recent Results. In: The Proceedings of the IEEE, special issue on Cryptographic Hardware and Embedded Systems (to appear) (Spring 2006)
Tiri, K., Verbauwhede, I.: Synthesis of Secure FPGA Implementations, In: The proceedings of the International Workshop on Logic and Synthesis (IWLS 2004), pp. 224-231 (June 2004)
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2006 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Standaert, F.X., Mace, F., Peeters, E., Quisquater, J.J. (2006). Updates on the Security of FPGAs Against Power Analysis Attacks. In: Bertels, K., Cardoso, J.M.P., Vassiliadis, S. (eds) Reconfigurable Computing: Architectures and Applications. ARC 2006. Lecture Notes in Computer Science, vol 3985. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11802839_42
Download citation
DOI: https://doi.org/10.1007/11802839_42
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-36708-6
Online ISBN: 978-3-540-36863-2
eBook Packages: Computer ScienceComputer Science (R0)