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High Performance CMOS Circuit by Using Charge Recycling Active Body-Bias Controlled SOI

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Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation (PATMOS 2006)

Abstract

In this paper, we propose a new technique for higher circuit speed without increase in leakage current by using active body-bias controlling technique. Conventional body-bias controlling techniques face difficulties, such as long transition time of body voltage and large area penalty. To overcome these issues, we propose a Charge Recycling Active Body-bias Controlled (CRABC) circuit scheme on SOI which enables quick control of body voltage by using simple additional circuit. The SPICE simulation results have shown that CRABC shortens delay time by 20 %, and transition time for controlling body-bias by 98 %.

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© 2006 Springer-Verlag Berlin Heidelberg

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Kitamura, M. et al. (2006). High Performance CMOS Circuit by Using Charge Recycling Active Body-Bias Controlled SOI. In: Vounckx, J., Azemard, N., Maurine, P. (eds) Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. PATMOS 2006. Lecture Notes in Computer Science, vol 4148. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11847083_38

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  • DOI: https://doi.org/10.1007/11847083_38

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-39094-7

  • Online ISBN: 978-3-540-39097-8

  • eBook Packages: Computer ScienceComputer Science (R0)

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