Abstract
Model checking is a set of formal verification techniques that aim to show that a structure representing a computational system (for instance, a protocol, or a hardware or a software component, among others) is a model for a property that represents a requirement for this system. Many model-checking approaches have been proposed, depending on the formalism the property is expressed in, and the class of structures used to represent the system under verification.
Preview
Unable to display preview. Download preview PDF.
Similar content being viewed by others
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2006 Springer-Verlag Berlin Heidelberg
About this chapter
Cite this chapter
Déharbe, D. (2006). Techniques for Temporal Logic Model Checking. In: Cavalcanti, A., Sampaio, A., Woodcock, J. (eds) Refinement Techniques in Software Engineering. PSSE 2004. Lecture Notes in Computer Science, vol 3167. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11889229_8
Download citation
DOI: https://doi.org/10.1007/11889229_8
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-46253-8
Online ISBN: 978-3-540-46254-5
eBook Packages: Computer ScienceComputer Science (R0)