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Two-Level Dynamic Programming Hardware Implementation for Real Time Processing

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Knowledge-Based Intelligent Information and Engineering Systems (KES 2006)

Part of the book series: Lecture Notes in Computer Science ((LNAI,volume 4251))

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Abstract

In this paper, we present an efficient architecture for connected speech recognition that can be efficiently implemented with FPGA. The architecture consists of newly derived two-level dynamic programming(TLDP) that use only bit addition and shift operations. The advantages of this architecture are the spatial efficiency to accommodate more words with limited space and the computational speed from avoiding propagation delays in multiplications. The architecture is highly regular, consisting of identical and simple processing elements with only nearest-neighbor communication, and external communication occurs with the end processing elements. In order to verify the proposed architecture, we have also designed and implemented it, prototyping with Xilinx FPGAs running at 33MHz.

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Authors and Affiliations

  1. Department of Electronic and Electrical Engineering, POSTECH, Pohang, Kyungbuk, 790-784, South Korea

    Yong Kim & Hong Jeong

Authors
  1. Yong Kim
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  2. Hong Jeong
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Editor information

Editors and Affiliations

  1. School of Design, Engineering and Computing, Bournemouth University, UK

    Bogdan Gabrys

  2. Centre for SMART Systems, School of Environment and Technology, University of Brighton, BN2 4GJ, Brighton, UK

    Robert J. Howlett

  3. School of Electrical and Information Engineering, Knowledge Based Intelligent Engineering Systems Centre, University of South Australia, Mawson Lakes, 5095, SA, Australia

    Lakhmi C. Jain

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© 2006 Springer-Verlag Berlin Heidelberg

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Kim, Y., Jeong, H. (2006). Two-Level Dynamic Programming Hardware Implementation for Real Time Processing. In: Gabrys, B., Howlett, R.J., Jain, L.C. (eds) Knowledge-Based Intelligent Information and Engineering Systems. KES 2006. Lecture Notes in Computer Science(), vol 4251. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11892960_131

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  • DOI: https://doi.org/10.1007/11892960_131

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-46535-5

  • Online ISBN: 978-3-540-46536-2

  • eBook Packages: Computer ScienceComputer Science (R0)

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