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Reconfigurable Interconnects in DSM Systems: A Focus on Context Switch Behavior

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Frontiers of High Performance Computing and Networking – ISPA 2006 Workshops (ISPA 2006)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 4331))

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Abstract

Recent advances in the development of reconfigurable optical interconnect technologies allow for the fabrication of low cost and run-time adaptable interconnects in large distributed shared-memory (DSM) multiprocessor machines. This can allow the use of adaptable interconnection networks that alleviate the huge bottleneck present due to the gap between the processing speed and the memory access time over the network. In this paper we have studied the scheduling of tasks by the kernel of the operating system (OS) and its influence on communication between the processing nodes of the system, focusing on the traffic generated just after a context switch. We aim to use these results as a basis to propose a potential reconfiguration of the network that could provide a significant speedup.

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References

  1. Dai, D., Panda, D.K.: How Much Does Network Contention Affect Distributed Shared Memory Performance? In: Proc. of the Int. Conf. on Parallel Processing, pp. 454–461 (1997)

    Google Scholar 

  2. Krewell, K.: Best servers of 2004: where multicore is the norm, Microprocessor report (January 2005)

    Google Scholar 

  3. Krishnamurthy, P.: Reconfigurability of the interconnect architecture for chip multiprocessors. In: Proc. of the 4th International Symposium on Information and Communication Technologies, pp. 136–141 (2005)

    Google Scholar 

  4. Mohammed, E., et al.: Optical interconnect system integration for ultra-short-reach application. Intel Technology Journal 8(2) (2004)

    Google Scholar 

  5. Heirman, W., Artundo, I., Desmet, L., Dambre, J., Debaes, C., Thienpont, H., Van Campenhout, J.: Speeding up multiprocessor machines with reconfigurable optical interconnects. In: Proc. of SPIE, Optoelectronic Integrated Circuits VIII, vol. 6124, pp. 156–167 (2006)

    Google Scholar 

  6. Artundo, I., Desmet, L., Heirman, W., Debaes, C., Dambre, J., Van Campenhout, J., Thienpont, H.: Selective optical broadcasting in reconfigurable multiprocessor interconnects. In: Proc. of SPIE Photonics Europe vol. 6185 (2006)

    Google Scholar 

  7. Tanenbaum, A.S.: Modern Operating Systems, 2nd edn. Prentice-Hall, Englewood Cliffs (2001)

    Google Scholar 

  8. Multithreading in the Solaris Operating System, Sun Microsystems technical whitepaper (2002)

    Google Scholar 

  9. Sinnen, O., Sousa, L.A.: Communication contention in task scheduling. IEEE Transactions on Parallel and Distributed Systems 16, 503–515 (2005)

    Article  Google Scholar 

  10. Magnusson, P.S., Christensson, M., Eskilson, J., Forsgren, D., Hållberg, G., Högberg, J., Larsson, F., Moestedt, A., Werner, B.: Simics: A Full System Simulation Platform. IEEE Computer, 50–58 (2002)

    Google Scholar 

  11. Heirman, W., Dambre, J., Artundo, I., Debaes, C., Thienpont, H., Stroobandt, D., Van Campenhout, J.: Predicting Reconfigurable Interconnect Performance in Distributed Shared-Memory Systems. Integration, the VLSI Journal: Special Issue on System Level Interconnect Prediction (to appear, 2007)

    Google Scholar 

  12. Woo, S., Ohara, M., Torrie, E., Singh, J., Gupta, A.: The SPLASH-2 programs: characterization and methodological considerations. In: Proc. of the 22nd Annual International Symposium on Computer Architecture, pp. 24–36 (1995)

    Google Scholar 

  13. Barford, P., Crovella, M.: Generating representative web workloads for network and server peformance evaluation. In: Proc. ACM SIGMETRICS, pp. 151–160 (1998)

    Google Scholar 

  14. Heirman, W., Dambre, J., Van Campenhout, J.: Congestion Modeling for Reconfigurable Inter-Processor Networks. In: Proc. of the International Workshop on System Level Interconnect Prediction, pp. 59–66 (2006)

    Google Scholar 

  15. Artundo, I., Desmet, L., Heirman, W., Debaes, C., Dambre, J., Van Campenhout, J., Thienpont, H.: Selective Optical Broadcast Component for Reconfigurable Multiprocessor Interconnects. Journal on Selected Topics in Quantum Electronics: Special Issue on Optical Communications 12, 828–837 (2006)

    Article  Google Scholar 

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© 2006 Springer-Verlag Berlin Heidelberg

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Artundo, I. et al. (2006). Reconfigurable Interconnects in DSM Systems: A Focus on Context Switch Behavior. In: Min, G., Di Martino, B., Yang, L.T., Guo, M., Rünger, G. (eds) Frontiers of High Performance Computing and Networking – ISPA 2006 Workshops. ISPA 2006. Lecture Notes in Computer Science, vol 4331. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11942634_33

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  • DOI: https://doi.org/10.1007/11942634_33

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-49860-5

  • Online ISBN: 978-3-540-49862-9

  • eBook Packages: Computer ScienceComputer Science (R0)

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