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A Realizable Distributed Ion-Trap Quantum Computer

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High Performance Computing - HiPC 2006 (HiPC 2006)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 4297))

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Abstract

Recent advances in trapped ion technology have rapidly accelerated efforts to construct a near-term, scalable quantum computer. Micro-machined electrodes in silicon are expected to trap hundreds of ions, each representing quantum bits, on a single chip. We find, however, that scalable systems must be composed of multiple chips and we explore inter-chip communication technologies. Specifically, we explore the parallelization of modular exponentiation, the substantially dominant portion of Shor’s algorithm, on multi-chip ion-trap systems with photon-mediated communication between chips.

Shor’s algorithm, which factors the product of two primes in polynomial time on quantum computers, has strong implications for public-key cryptography and has been the driving application behind much of the research in quantum computing. Parallelization of the algorithm is necessary to obtain tractable execution times on large problems. Our results indicate that a 1024-bit RSA key can be factored in 13 days given 4300 (each of area 10 by 10 centimeters) ion-trap chips in a multi-chip system.

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© 2006 Springer-Verlag Berlin Heidelberg

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Thaker, D.D., Metodi, T.S., Chong, F.T. (2006). A Realizable Distributed Ion-Trap Quantum Computer. In: Robert, Y., Parashar, M., Badrinath, R., Prasanna, V.K. (eds) High Performance Computing - HiPC 2006. HiPC 2006. Lecture Notes in Computer Science, vol 4297. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11945918_16

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  • DOI: https://doi.org/10.1007/11945918_16

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-68039-0

  • Online ISBN: 978-3-540-68040-6

  • eBook Packages: Computer ScienceComputer Science (R0)

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