Abstract
First, a short evalution of the recent progress on the question of how the brain works is given and evidence submitted for the need of largescale computational approaches to neural computing which are as tightly as possible related to the known details of neural hardware and function. The crucial role of the firmware-level (modular) organization of neural mass for understanding the flexibility of neural computing is stressed. Based on both the anatomy of a neocortical column and an approach to the interpretation of complex scenes by the visual cortex, a functional architecture of a cortical processor is proposed with special emphasis on the dynamics of selfcontrol.
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Koerner, E., Tsuda, I., Shimizu, H. (1987). Parallel in sequence — Towards the architecture of an elementary cortical processor. In: Albrecht, A., Jung, H., Mehlhorn, K. (eds) Parallel Algorithms and Architectures. Lecture Notes in Computer Science, vol 269. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-18099-0_27
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DOI: https://doi.org/10.1007/3-540-18099-0_27
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