Skip to main content

The mapping of applications to multiple bus and Banyan interconnected multiprocessor systems: A case study

  • Session 6A: Problem Mapping And Scheduling
  • Conference paper
  • First Online:
Supercomputing (ICS 1987)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 297))

Included in the following conference series:

  • 135 Accesses

Abstract

We study the mapping of a robot elbow manipulator application, to two different classes of multiprocessor systems the multiple bus and Banyan interconnected systems. A comparative performance analysis of the two systems is performed. The application is partitioned into communicating computational modules and three different partitions of it are approximated. Fast heuristic algorithms are used to produce assignments of modules to processors. A number of performance measures are also employed to evaluate the matching of application/architecture pairs.

This research was supported by NSF grant DMC-8508684A1.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. Abraham, S. G., Davidson, E. S., "Task assignment using Network flow methods for minimizing communication in n-processor systems," Technical Report, CSRD Rpt. No. 598, Center of Supercomputing Research and Development, National Center of Supercomputing Applications, University of Illinois at Urbana-Champaign, September 1986.

    Google Scholar 

  2. Allen, A. O., Probability Statistics and Queueing Theory, Academic Press, 1978.

    Google Scholar 

  3. Batcher, K. E., "The Flip Network in STARAN," 1976 Int'l. Conf. on Parallel Processing, Aug. 1976, pp. 65–71.

    Google Scholar 

  4. Berman, F. Snyder, L., "On mapping parallel algorithms in parallel architectures," Proceedings of the International Conference on Parallel Processing, 1984, pp. 307–309.

    Google Scholar 

  5. Berman, F., Goodrich, M., Koelbel, C., Robinson, III, W. J. Showell, K., "Prep-p: A mapping preprocessor for chip computers," Proceedings of the International Conference on Parallel Processing, 1985, pp. 731–733.

    Google Scholar 

  6. Berman, F., Haden, P., "A compartive study of mapping algorithms for an automated parallel programming environment," Computer Science Technical Report Number CS-088, University of California, San Diego, La Jolla, CA 92093.

    Google Scholar 

  7. Bokhari, Shamid, H., "On the Mapping Problem," IEEE Transactions on Computers, Vol. C-30, No. 3, 1981, pp. 207–214.

    Google Scholar 

  8. W. W. Chu, L. J. Holloway, M. T. Lan, K. Efe, "Task Allocation in Distributed Data Processing," Computer, November 1980, pp. 57–69.

    Google Scholar 

  9. K. Efe, "Heuristic Models of Task Assignment Scheduling in Distributed Systems," Computer, Vol. 15, No. 6, June 1982, pp. 50–56.

    Google Scholar 

  10. Fujimoto, R. M., "The SIMON simulation and development system," Summer Computer Simulation Conference, 1985 (Univ. of Utah).

    Google Scholar 

  11. Gilbert, J. R., Zmijewski, E., "A parallel graph Partitioning Algorithm for a Message-Passing Multiprocessor," Technical Report, TR 87-803, Department of Computer Science, Cornell University, Ithaca, N.Y., January 1987.

    Google Scholar 

  12. V. B. Gylys, J. A. Edwards, "Optimal Partitioning of Workload for Distributed Systems," Proceeding Compcon, Fall 1976, pp. 353–357.

    Google Scholar 

  13. Houstis, C. E., Houstis, E. N., Rice, J., "Partitioning and Allocation of PDE Computation to Distributed Systems," PDE Software: Modules Interfaces and Systems, Edited by B. Enguist and T. Smedsass, North Holland, 1983.

    Google Scholar 

  14. Houstis, C. E., Houstis, E. N., Rice, J. J., "Partitioning PDE Computation: Methods and Performance Evaluation," invited paper, Journal of Parallel Computing, No. 4, 1987.

    Google Scholar 

  15. Houstis, Catherine, "Allocation of Real-Time Applications to Distributed Systems," accepted for presentation in the 1987 International Conference on Parallel Processing, August 1987.

    Google Scholar 

  16. Houstis, C. E., "Distributed Processing Performance Evaluation", accepted for presentation to the Third International Conference on Data Communication Systems and Their Performance, Rio di Janeiro, Brazil, June 22–25, 1987.

    Google Scholar 

  17. Jenny, C. J., "Process Partitioning on Distributed Systems," Digest of paper National Telecommunications Conference, 1977, pp. 31:1–31:10.

    Google Scholar 

  18. Kasahara, H., Narita, S., "Parallel Processing of Robot-Arm Control Computation on a Multiprocessor System," IEEE Journal of Robotics and Automation, Vol. RA-1, No. 2, June 1985, pp. 104–113.

    Google Scholar 

  19. Kleinrock, Leonard, "Distributed Systems," Communications of ACM, Vol. 28, Number 11, 1985, pp. 1200–1213.

    Google Scholar 

  20. Kruskal, C., Snir, M., "The performance of multistage Interconnection Nets for multiprocessing," IEEE Transactions on Computers, Vol. C-32, No. 12, 1983, pp. 1091–1098.

    Google Scholar 

  21. Lawrie, D., "Access and Alignment of Data in an Array Processor," IEEE Transactions on Computers, Vol. C-24, No. 12, Dec. 1975, pp. 1145–1155.

    Google Scholar 

  22. Marsan, M. A., Gerla, M., "Markov models for Multiple Bus Multiprocessor Systems," IEEE Transactions on Computers, Vol. C-32, No. 3, 1983, pp. 239–248.

    Google Scholar 

  23. O'Leary, D. P. and G. W. Stewart, "Data-flow algorithms for parallel matrix computations," Communication of ACM, Vol. 28, 1985, pp. 840–853.

    Google Scholar 

  24. Patel, J. H., "Processors-Memory Interconnections for Multiprocessors," in Proc. 6th Ann. Symp. Computer Arch., pp. 168–177, Apr. 1979.

    Google Scholar 

  25. Marinescu, D., Rice, J., "Domain oriented analysis of DOE splitting algorithms," to appear in the Journal of Information Science, July 1987.

    Google Scholar 

  26. Sarkov, V., Hennessy, J., "Compile-time Partitioning and Scheduling of Parallel Programs," Proceedings of the SIGPLAN 1986 Symposium on Compiler Instructions, June 1986, pp. 17–36.

    Google Scholar 

  27. Siegel, H. J. and Smith, H. D., "Study of Multistage SIMD Interconnection Networks," 5th Annual Symposium on Computer Architecture, Apr. 1978, pp. 223–229.

    Google Scholar 

  28. Siegel, H. J., McMillen, R. J., and Mueller, P. T., Jr., "A Survey of Interconnection methods for Reconfigurable Parallel Processing Systems," 1978 Int'l Conf. on Parallel Processing, Aug. 1978, pp. 9–17.

    Google Scholar 

  29. Siegel, L., Siegel, H. J., Swain, P. H., "Performance Measures for evaluating algorithms for SIMD machines," IEEE Transaction on Software Engineering, Vol. SE-8, No. 4, July 1984, pp. 319–331.

    Google Scholar 

  30. Siegel, H., Interconnection Networks for Large-Scale Parallel Processing, Heath and Company, 1985.

    Google Scholar 

  31. Stone, H. S., Bokhari, S. H., "Control of Distributed Processes," Computer, Vol. 11, No. 7, July 1978, pp. 97–106.

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Editor information

E. N. Houstis T. S. Papatheodorou C. D. Polychronopoulos

Rights and permissions

Reprints and permissions

Copyright information

© 1988 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Houstis, C.E., Aboelaze, M. (1988). The mapping of applications to multiple bus and Banyan interconnected multiprocessor systems: A case study. In: Houstis, E.N., Papatheodorou, T.S., Polychronopoulos, C.D. (eds) Supercomputing. ICS 1987. Lecture Notes in Computer Science, vol 297. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-18991-2_30

Download citation

  • DOI: https://doi.org/10.1007/3-540-18991-2_30

  • Published:

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-18991-6

  • Online ISBN: 978-3-540-38888-3

  • eBook Packages: Springer Book Archive

Publish with us

Policies and ethics