Abstract
In previous work we have demonstrated how the functional language SAFL can be used as a behavioural hardware description language. Other work (such as μFP and Lava) has demonstrated that functional languages are apposite for structural hardware description.
One of the strengths of systems such as VHDL and Verilog is their ability to mix structural- and behavioural-level primitives in a single specification. Motivated by this observation, we describe a unified framework in which a stratified functional language is used to specify hardware across different levels of abstraction: Lava-style structural expansion is used to generate acyclic combinatorial circuits; these combinatorial fragments are composed at the SAFL-level. We demonstrate the utility of this programming paradigm by means of a realistic case-study. Our tools have been used to specify, simulate and synthesise a DES encryption/ decryption circuit. Area-time performance figures are presented.
Finally, we show how similar integration techniques can be used to embed languages such as Magma/Lava into industrial HDLs such as Verilog and VHDL. Our methodology offers significant advantages over the “Perlscript” technique so commonly employed in practice.
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Sharp, R. (2002). Functional Design Using Behavioural and Structural Components. In: Aagaard, M.D., O’Leary, J.W. (eds) Formal Methods in Computer-Aided Design. FMCAD 2002. Lecture Notes in Computer Science, vol 2517. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-36126-X_20
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DOI: https://doi.org/10.1007/3-540-36126-X_20
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