Abstract
The problem of organizing the temporal behavior of digital systems is discussed. This problem is mainly associated with providing the interface between physical (natural) and logical (artificial) time. The most common method of interfacing is based on a system clock that removes physical time from the behavior models A number of algorithms that can be easily formulated in logical time present a great dificulty in the asynchronous case. The suggested GALA (Globally Asynchronous - Locally Arbitrary) design methodology is based on decomposing the system to a Processors Stratum and a Synchro-Stratum. The synchro-stratum acts as a distributed asynchronous clock that produces local synchro-signals for the processor stratum, which is basically a synchronous prototype. A synchro-stratum, like any asynchronous circuit, interacts with the external devices, including the processor stratum, by handshake. Every local device produces an acknowledgment signal and sends it to the synchro-stratum. The designer can use a wide range of methods to implement this signal (Locally Arbitrary): from a self-timed design to a built-in parallel delay. For various disciplines of prototype clocking, corresponding synchro-stratum implementations are suggested. The GALA methodology is illustrated on several design examples, such as a counter with constant response time, one-two-one track FiFo, arbitration-free counterflow processor architecture. “Problems are divided into unsolvable and trivial ones.” Mathematical folklore.
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Varshavsky, V., Marakhovsky, V. (2002). GALA (Globally Asynchronous — Locally Arbitrary) Design. In: Cortadella, J., Yakovlev, A., Rozenberg, G. (eds) Concurrency and Hardware Design. Lecture Notes in Computer Science, vol 2549. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-36190-1_3
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