Abstract
Recent cache research has mainly focussed on how to split the first-level data cache. This paper concentrates on the redesign of the filter data cache scheme, presenting some improvements on the first version of the scheme. A performance study compares these proposals with other organizations that split caches according to the criterion of data localities. The new filter cache schemes exhibit better performances than the other compared solutions. An 18 KB organization offers a block management capacity equivalent to a conventional 28 KB cache.
This work has been partially supported by Research Grant GV98-14-47
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
Similar content being viewed by others
References
A. González, Carlos Aliaga, and M. Valero, “A Data Cache with Multiple Caching Strategies Tuned to Different Types of Locality,” Proceedings of the ACM International Conference on Supercomputing, Barcelona, Spain 1995, pp. 338–347.
V. Milutinovic, B. Markovic, M. Tomasevic, and M. Tremblay, “The Split Temporal/ Spatial Cache: Initial Performance Analysis,” Proceedings of the SCIzzL-5, Santa Clara, California, USA, March 1996, pp. 63–69.
J.A. Rivers and E.S. Davidson, “Reducing Conflicts in Direct-Mapped Caches with a Temporality-Based Design,” Proceedings of the 1966 ICPP, August 1996, pp. 151–160.
M. Prvulovic, D. Marinov, Z. Dimitrijevic and V. Milutinovic, “The Split Spatial/ Non Spatial Cache: A Performance and Complexity Analysis,” IEEE TCCA Newsletter, July 1999, pp. 8–17.
J. Sánchez and A. González, “A Locality Sensitive Multi-Module Cache with Explicit Management,” Proceedings of the ACM International Conference on Supercomputing, Rhodes, Greece, June 1999.
J. Sahuquillo and A. Pont, “The Filter Cache: A Run-Time Cache Management Approach,” Proceedings of the 25th Euromicro Conference, Milan, Italy, September 1999, pp. 424–431.
K.K. Chan, C.C. Hay, J.R. Keller, G.P. Kurpanek, F.X. Schumacher, J. Zheng, “Design of the HP PA 7200 CPU,” Hewlett-Packard Journal, February 1996, pp. 1–12.
N. Jouppi, “Improving Direct-Mapped Cache Performance by the Addition of a Small Fully-Associative Cache and Prefetch Buffers,” Proceedings of the ISCA-17, June 1990, pp.364–373.
E.S. Tam, ldImproving Cache Performance via Active Management,” Ph.D. dissertation, University of Michigan, June 1999.
G. Tyson, M. Farrens, J. Matthews, and A.R. Pleszkun, “A Modified Approach to Data Cache Management,” Proceedings of Micro-28, December 1995, pp. 93–103.
T. Johnson and W.W. Whu, “Run-time Adaptative Cache Hierarchy Management via Reference Analysis,” Proceedings of the ISCA-24, June 1997, pp. 315–326.
M. Tomasko, S. Hadjiyiannis, and W. A. Najjar, “Experimental Evaluation of Array Caches,” IEEE TCCA Newsletter, March 1997, pp. 11–16.
T. Johnson, D. A. Connors, M.C. Merten, and W.W. Whu, “Run-time Cache Bypassing,” IEEE Transactions on Computers, vol. 48, no. 12, December 1999, pp. 1338–1354.
I. Ikodinovic, D. Magdic, A. Milenkovic, and V. Milutinovic, “Limes: A Multiprocessor Simulation Environment for PC Platforms,” Proceedings of the Third International Conference on Parallel Processing and Applied Mathematics, Poland, 1999, pp. 398–412.
A. Milenkovic, “Cache Injection in Bus-Based Shared Memory Multiprocessors,” Ph.D dissertation, University of Belgrade, 1999.
E.S. Tam, J.A. Rivers, V. Srinivasan, G.S. Tyson, and E.S. Davidson, “Active Management of Data Caches by Exploiting Reuse Information,” IEEE Transactions on Computers, vol. 48, no. 11, November 1999, pp. 1244–1259.
V. Milutinovic, and M. Valero,“Cache Memory and Related Problems: Enhancing and Exploiting the Locality,” IEEE Transactions on Computers, vol. 48, no. 2, February 1999, pp. 97–99.
V. Milutinovic, and P. Strenstrom,“Scanning the Special Issue on Distributed Shared Memory Systems,” Proceedings of the IEEE, vol. 87, no. 3, March 1999, pp. 399–403.
V. Milutinovic, “Microprocessor and Multimicroprocessor Systems,” Wiley, 2000.
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2000 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Sahuquillo, J., Pont, A., Milutinovic, V. (2000). The Filter Data Cache: A Tour Management Comparison with Related Split Data Cache Schemes Sensitive to Data Localities. In: Valero, M., Joe, K., Kitsuregawa, M., Tanaka, H. (eds) High Performance Computing. ISHPC 2000. Lecture Notes in Computer Science, vol 1940. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-39999-2_30
Download citation
DOI: https://doi.org/10.1007/3-540-39999-2_30
Published:
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-41128-4
Online ISBN: 978-3-540-39999-5
eBook Packages: Springer Book Archive