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System-Level Design Methods for Low-Energy Architectures Containing Variable Voltage Processors

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Power-Aware Computer Systems (PACS 2000)

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Abstract

This paper focuses on system-level design methods for low energy consumption in architectures employing variable-voltage processors. Two lowenergy design flows are introduced. The first, Speed-up and Stretch, is based on the performance vs. low-energy design trade-off. The second, Eye-on-Energy, is based on energy sensitive scheduling and assignment techniques. Both of the approaches presented in this paper use simulated annealing to generate task-to-processor assignments. Also, both use list-scheduling based methods for scheduling. The set of experiments presented here characterize the newly introduced approaches, while giving an idea about the cost vs. low-energy and performance vs. low-energy design trade-offs a designer has to make.

This work was sponsored by ARTES: A network for Real-Time research and graduate Education in Sweden. http://www.artes.uu.se/

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© 2001 Springer-Verlag Berlin Heidelberg

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Gruian, F. (2001). System-Level Design Methods for Low-Energy Architectures Containing Variable Voltage Processors. In: Falsafi, B., Vijaykumar, T.N. (eds) Power-Aware Computer Systems. PACS 2000. Lecture Notes in Computer Science, vol 2008. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-44572-2_1

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  • DOI: https://doi.org/10.1007/3-540-44572-2_1

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-42329-4

  • Online ISBN: 978-3-540-44572-2

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