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Dataflow Partitioning and Scheduling Algorithms for WASMII, a Virtual Hardware

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Field-Programmable Logic and Applications: The Roadmap to Reconfigurable Computing (FPL 2000)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1896))

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Abstract

This paper presents a new dataflow graph partitioning algorithm for a data driven virtual hardware system called WASMII. The algorithm divides a dataflow graph into multiple subgraphs so as not to cause a deadlock. Then the subgraphs are translated into an FPGA configuration and executed on WASMII in a time-multiplexed manner. The experimental results show the proposed algorithms can achieve 13% to 39% improvement of execution performance compared to other existing graph partitioning algorithms at the most.

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References

  1. X.-P. Ling, H. Amano: “WASMII: A Data Driven Computer on a Virtual Hardware” Proc. FCCM’ 93, pp. 33–42, 1993.

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  3. H. Miyazaki, Y. Shibata, A. Takayama, X. Ling and H. Amano: “Emulation of Multichip WASMII on Reconfigurable System Testbed FLEMING” PACT’98 Workshop on Reconfigurable Computing, pp. 47–52(1998)

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  6. Karthikeya M.Gajjala Purna and Dinesh Bhatia: “Temporal Partitioning and Scheduling Data Flow Graphs for Reconfigurable Computers” IEEE Trans. Computers, Vol. 48, pp. 579–590, June, 1999.

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Author information

Authors and Affiliations

  1. Department of Computer Science, Keio University, 3-14-1 Hiyoshi, Yokohama, 223-8522, Japan

    Atsushi Takayama, Yuichiro Shibata, Keisuke Iwai & Hideharu Amano

Authors
  1. Atsushi Takayama
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  2. Yuichiro Shibata
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  3. Keisuke Iwai
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  4. Hideharu Amano
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Editor information

Editors and Affiliations

  1. Computer Science Department, University of Kaiserslautern, P. O. Box. 30 49, 67653, Kaiserslautern, Germany

    Reiner W. Hartenstein

  2. Carinthia Tech Institute, Richard-Wagner-Str. 19, 9500, Villach, Austria

    Herbert Grünbacher

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© 2000 Springer-Verlag Berlin Heidelberg

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Takayama, A., Shibata, Y., Iwai, K., Amano, H. (2000). Dataflow Partitioning and Scheduling Algorithms for WASMII, a Virtual Hardware. In: Hartenstein, R.W., Grünbacher, H. (eds) Field-Programmable Logic and Applications: The Roadmap to Reconfigurable Computing. FPL 2000. Lecture Notes in Computer Science, vol 1896. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-44614-1_73

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  • DOI: https://doi.org/10.1007/3-540-44614-1_73

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-67899-1

  • Online ISBN: 978-3-540-44614-9

  • eBook Packages: Springer Book Archive

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