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Synthesis and Implementation of RAM-Based Finite State Machines in FPGAs

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Field-Programmable Logic and Applications: The Roadmap to Reconfigurable Computing (FPL 2000)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1896))

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Abstract

This paper discusses the design and implementation of finite state machines (FSM) with combinational circuits that are built primarily from RAM blocks. It suggests a novel state assignment technique, based on fuzzy codes, that is combined with the replacement (encoding) of the FSM input vectors. It also shows how FSMs with dynamically modifiable functionality can be constructed and then implemented in commercially available FPGAs. The results of experiments have shown that FSMs with the proposed architecture can be implemented using less hardware resources, such as the number of FPGA configurable logic blocks (CLB), while at the same time extending their functional capabilities.

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References

  1. Giovanni De Micheli: Synthesis and Optimization of Digital Circuits: McGraw-Hill, Inc., (1994)

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  3. Sklyarov, V.: Synthesis of FSMs based on matrix LSI. Science and Technique, Minsk (1984)

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  4. Sklyarov, V.: Hierarchical Finite State Machines and Their Use for Digital Control. IEEE Transactions on VLSI Systems. Vol. 7, No 2 (1999) 222–228

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© 2000 Springer-Verlag Berlin Heidelberg

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Sklyarov, V. (2000). Synthesis and Implementation of RAM-Based Finite State Machines in FPGAs. In: Hartenstein, R.W., Grünbacher, H. (eds) Field-Programmable Logic and Applications: The Roadmap to Reconfigurable Computing. FPL 2000. Lecture Notes in Computer Science, vol 1896. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-44614-1_76

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  • DOI: https://doi.org/10.1007/3-540-44614-1_76

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-67899-1

  • Online ISBN: 978-3-540-44614-9

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