Abstract
We describe our formal verification that the Alpha 21364’s network protocol guarantees delivery and maintains necessary message ordering. We describe the protocol and its formalization, and the formalization and proof of deadlock freedom and liveness. We briefly describe our experience with using three tools (SMV, PVS, and TLA+/TLC), with the cost effectiveness of formal methods, and with software engineering of formal specs.
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References
Peter Bannon. Alpha 21364: a scalable single-chip SMP. In Microprocessor Forum (Cahners MicroDesign Resources), pages 68–80, October 1998. http://www.digital.com/alphaoem/present/index.htm.
[BBJ+95]_M. Bass, T.W. Blanchard, D.D. Josephson, D. Weir, and D.L. Halperin. Design methodologies for the PA 7100LC microprocessor. Hewlett-Packard Journal, 1995.
Ricky W. Butler and Jon A. Sjogren. A PVS Graph Theory Library. Technical Report Memorandum, NASA Langly Research Center, December 1997. http://atb-www.larc.nasa.gov/ftp/larc/PVS-library.
W.J. Dally and C.L. Seitz. Deadlock-free message routing in multiprocessor interconnection networks. IEEE Transactions on Computers, 1987.
Mike Kantrowitz and Lisa M. Noack. Functional verification of a multi-issue, pipelined, superscalar Alpha processor-the Alpha 21164 CPU chip. Digital Technical Journal, 1995.
Leslie Lamport. Specifying concurrent systems with TLA+. In Manfred. Broy and Ralf Steinbrüggen, editors, Calculational System Design, pages 183–247. IOS Press, 1999.
K.L. McMillan. Getting started with SMV. Technical report, Cadence Berkeley Labs, December 1999. http://www-cad.eecs.berkeley.edu:80/~kenmcmil/.
A. Mokkedem, R. Hosabettu, M.D. Jones, and G. Gopalakrishan. Formalization and analysis of a solution to the PCI 2.1 bus transaction ordering problem. Formal Methods in System Design, 2000.
N. Shankar, S. Owre, and J. M. Rushby. PVS Tutorial. Computer Science Laboratory, SRI International, Menlo Park, CA, February 1993. Also appears in Tutorial Notes, Formal Methods Europe’ 93: Industrial-Strength Formal Methods, pages 357–406, Odense, Denmark, April 1993.
[TQB+98]_Scott A. Taylor, Michael Quinn, Darren Brown, Nathan Dohm, Scot Hildebrandt, James Huggins, and Carl Ramey. Functional verification of a multiple-issue, out-of-order, superscalar Alpha processor-the DEC Alpha 21264 microprocessor. In Design Automation Conference, DAC’ 98, pages 638–643, Moscone center, San Francico, California, USA, June 1998. Association for Computing Machinery.
Yuan Yu, Panagiotis Manolios, and Leslie Lamport. Model checking TLA+ specifications. In Laurence Pierre and Thomas Kropf, editors, Correct Hardware Design and Verification Methods, LNCS, pages 54–66. Springer-Verlag, September 1999.
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Mokkedem, A., Leonard, T. (2000). Formal Verification of the Alpha 21364 Network Protocol. In: Aagaard, M., Harrison, J. (eds) Theorem Proving in Higher Order Logics. TPHOLs 2000. Lecture Notes in Computer Science, vol 1869. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-44659-1_28
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DOI: https://doi.org/10.1007/3-540-44659-1_28
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