Skip to main content

Implementation of a NURBS to Bézier Conversor with Constant Latency

  • Conference paper
  • First Online:
Field-Programmable Logic and Applications (FPL 2001)

Abstract

In this paper, a FPGA implementation is presented to carry out the conversion process from NURBS to Bézier curves. It has a simple and regular timing schedule with a constant latency which reduces the area requirements with respect to previous implementations. The operation frequency obtained with the Xilinx tools, is around 13 MHz. The scheme we propose can be easily extended to process NURBS and Bézier surfaces.

This work was supported in part by the Secretaria Xeral de Investigacion e Desenvolvemento de Galicia (Spain) under contract PGIDT99-PXI20602B.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Subscribe and save

Springer+ Basic
$34.99 /Month
  • Get 10 units per month
  • Download Article/Chapter or eBook
  • 1 Unit = 1 Article or 1 Chapter
  • Cancel anytime
Subscribe now

Buy Now

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

Similar content being viewed by others

References

  1. Foley, J.D.: Computer Graphics: Principles and Practice. 2nd edn. Ed. Addison-Wesley (1996)

    Google Scholar 

  2. Piegl, L., Tiller, W.: The NURBS Book. 2nd edn. Ed. Springer (1997)

    Google Scholar 

  3. Kumar, S., Manocha, D., Lastra, A.: Interactive Display of Large-Scaled NURBS models. IEEE Transactions on Visualization and Computer Graphics, Vol. 2, No. 4, (1996) 323–336

    Article  Google Scholar 

  4. Xilinx 4000 Series datasheet: http://www.xilinx.com/products/products.htm

  5. Mallón, P. N., Bóo, M., Bruguera, J.D.: Parallel Architecture for Conversion of NURBS Curves to Bézier Curves. Proc. Int. Conf. Euromicro 2000. Workshop on Digital Systems Design. DSD2000 (2000) 324–331

    Google Scholar 

  6. MIETEC: Library Data Book 0.35 μ CMOS Technology

    Google Scholar 

  7. Hauck, S., Hosler, M. M., Fry, T. W.: High-Performance Carry Chains for FPGA’s. IEEE Transactions on VLSI Systems, Vol. 8, No. 2, (2000) 138–147

    Article  Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2001 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Mallón, P.N., Bóo, M., Bruguera, J.D. (2001). Implementation of a NURBS to Bézier Conversor with Constant Latency. In: Brebner, G., Woods, R. (eds) Field-Programmable Logic and Applications. FPL 2001. Lecture Notes in Computer Science, vol 2147. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-44687-7_22

Download citation

  • DOI: https://doi.org/10.1007/3-540-44687-7_22

  • Published:

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-42499-4

  • Online ISBN: 978-3-540-44687-3

  • eBook Packages: Springer Book Archive

Publish with us

Policies and ethics