Abstract
In this paper, we present an effective algorithm and a simple hardware structure for the implementation of AB 2 multiplication using irreducible all one polynomial (AOP) in finite field GF(2m). We argue with a problem that conventional algorithms using irreducible AOP are operated in extended basis, then we propose an effective algorithm and an architecture which are operated in the polynomial basis. The proposed algorithm is substantially considered relationships between operands based on inner-product computation. Based on the algorithm, we propose an architecture in which its results can be immediately used for other operations. Specially, the algorithm and architecture are useful conception for modular exponentiation since exponentiation is computed by repetition of AB 2 multiplication.
This research was supported by University IT Research Center Project.
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References
A.J. Menezes: Elliptic Curve Public Key Cryptosystems, Boston, MA: Kluwer Academic Publishers (1993).
E.R. Berlekamp, “Bit-serial Reed-Solomon encoders”, IEEE Trans. IT-28, vol. 6, pp. 869–874, (1982).
C.L Wang and J.H. Guo, “New systolic arrays for AB 2+C, inversion, and division in GF(2m)”, Proc.1995 European Conference Circuit Theory Design (ECCTD”95), pp.431–434, Istanbul, Turkey, (Aug. 1995).
S.W. Wei, “VLSI architectures for computing exponentiations, multiplications, multiplicative inverses, and divisions in GF(2m)”, IEEE Trans. Circuit & Systems, Analog and Digital Signal Processing, vol.44, No. 10, pp.847–855, (Oct.1997).
S.W. Wei, “A systolic power-sum circuit for GF(2m)”, IEEE Trans. Comp., vol.43,No. 2, pp.258–262, (1990).
S.T.J. Fenn, M.G. Parker, M. Benaissa, and D. Tayler, “Bit-serial multiplication in GF(2m) using irreducible all-one polynomial”, IEE Proc. Comput. Digit.Tech., vol. 144, No. 6 pp. 391–393, (1997).
C.H. Liu, N.F. Huang, and C.Y. Lee, “Computation of AB 2 Multiplier in GF(2m) Using an Efficient Low-Complexity Cellular Architecture”, IEICE Trans. Fundamentals, vol. E83-A, No. 12, pp. 2657–2663, (2000).
T. Itoh and S. Tsujii, “Structure of parallel multipliers for a class of fields GF(2m)”, Information and Computation, vol. 83, pp. 21–40, (1989).
C.K. Koc and B. Sunar, “Low complexity bit-parallel canonical and normal basis multipliers for a class of finite fields”, IEEE Trans. Comp., vol.47, No. 3, pp.353–356, (1998).
D.E. Knuth: The Art of Computer Programming. Volume 2: Semi-numerical Algorithms, Addison-Wesley, Reading, Massachusetts, 2nd edition, (1998).
C.L. Wang and J.L. Lin, “Systolic Array Implementation of Multiplier for Finite Fields GF(2m)”, IEEE Trans. on Circuits and Systems, vol. 38, pp. 796–800, (July 1991).
N.Y. Kim, H.S. Kim, W.H Lee, K.W. Kim, and K.Y. Yoo, “New AB 2 Systolic Architectures in GF(2m)”, Proceedings of the ISCA 17th International Conference on Computers and Their Applications(CATA 2002), pp 394–397, April. 4–6, San Francisco, California, USA, (2002).
H.S. Kim, Bit-Serial AOP Arithmetic architecture for Modular Exponentiation, Ph.D Thesis, Kyungpook National University, (2002).
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Jeon, JC., Yoo, KY. (2003). Computational Algorithm and Architecture for AB2 Multiplication in Finite Fields. In: Kumar, V., Gavrilova, M.L., Tan, C.J.K., L’Ecuyer, P. (eds) Computational Science and Its Applications — ICCSA 2003. ICCSA 2003. Lecture Notes in Computer Science, vol 2667. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-44839-X_100
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DOI: https://doi.org/10.1007/3-540-44839-X_100
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