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OpenMP Application Tuning Using Hardware Performance Counters

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OpenMP Shared Memory Parallel Programming (WOMPAT 2003)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 2716))

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Abstract

Hardware counter events on some popular architectures were investigated with the purpose of detecting bottle-necks of particular interest to shared memory programming, such as OpenMP. A fully portable test suite was written in OpenMP, accessing the hardware performance counters be means of PAPI. Relevant events for the intended purpose were shown to exist on the investigated platforms. Further, these events could in most cases be accessed directly through their platform independent, PAPI pre-defined, names. In some cases suggestions for improvement in the pre-defined mapping were made based on the experiments.

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References

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Author information

Authors and Affiliations

  1. Parallelldatorcentrum (PDC), Royal Institute of Technology, SE100 44, Stockholm, Sweden

    Nils Smeds

Authors
  1. Nils Smeds
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Editor information

Editors and Affiliations

  1. Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, 10 King’s College Road, Toronto, Ontario, M5S 3G4, Canada

    Michael J. Voss

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© 2003 Springer-Verlag Berlin Heidelberg

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Smeds, N. (2003). OpenMP Application Tuning Using Hardware Performance Counters. In: Voss, M.J. (eds) OpenMP Shared Memory Parallel Programming. WOMPAT 2003. Lecture Notes in Computer Science, vol 2716. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-45009-2_20

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  • DOI: https://doi.org/10.1007/3-540-45009-2_20

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-40435-4

  • Online ISBN: 978-3-540-45009-2

  • eBook Packages: Springer Book Archive

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