Skip to main content
SpringerLink
Log in

Impact of Voltage Scaling on Glitch Power Consumption

  • Conference paper
  • First Online:
Integrated Circuit Design (PATMOS 2000)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1918))

Abstract

To be able to predict the importance of glitches in future deep-submicron processes with lowered supply and threshold voltages, a study has been conducted on designs, which experience glitching, at supply voltages in the range from 3.5 V to 1.0 V. The results show that the dynamic power consumption caused by glitches will, in comparison to the dynamic power consumption of transitions, be at least as important in the future as it is today.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Log in via an institution
Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 39.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 54.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. J. Leijten, J. van Meerbergen, and J. Jess, “Analysis and Reduction of Glitches in Synchronous Networks”, in Proceedings of the 1995 European Design and Test Conference, 1995, pp. 398–403.

    Google Scholar 

  2. S. Kim and S.-Y. Hwang, “Efficient Algorithm for Glitch Power Reduction”, Electronics Letters, vol. 35, no. 13, pp. 1040–1041, June 1999.

    Google Scholar 

  3. A. Raghunathan, S. Dey, and N. K. Jha, “Register Transfer Level Power Optimization with Emphasis on Glitch Analysis and Reduction”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 18, no. 8, pp. 1114–1131, Aug. 1999.

    Google Scholar 

  4. Semiconductor Industry Association, International Technology Roadmap for Semiconductors: 1999 edition, Austin, TX:International SEMATECH, 1999.

    Google Scholar 

  5. B. Davari, “CMOS Technology: Present and Future”, in Digest of Technical Papers, 1999 Symposium on VLSI Circuits, 1999, pp. 5–10.

    Google Scholar 

  6. J. M. Rabaey, Digital Integrated Circuits, A Design Perspective, Electronics and VLSI Series. Prentice Hall, 1996.

    Google Scholar 

  7. T. Sakurai and A. R. Newton, “Alpha-Power Law MOSFET Model and its Applications to CMOS Inverter Delay and Other Formulas”, IEEE Journal of Solid-State Circuits, vol. 25, no. 2, pp. 584–594, Apr. 1990.

    Google Scholar 

Download references

Author information

Authors and Affiliations

  1. Electronic Devices, Department of Physics and Measurement Technology, Linköpings universitet, SE-581 83, Linköping, Sweden

    Henrik Eriksson & Per Larsson-Edefors

Authors
  1. Henrik Eriksson
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Per Larsson-Edefors
    View author publications

    You can also search for this author in PubMed Google Scholar

Editor information

Editors and Affiliations

  1. Dept.of Electrical & Computer Engineering, Democritus University of Thrace, 67100, Xanthi, Greece

    Dimitrios Soudris

  2. Institute for Communication Theory and Signal Processing, University of Hanover, Appelstr.4, 30167, Hanover, Germany

    Peter Pirsch

  3. Institute for Microelectronic Systems, University of Hanover, Appelstr.4, 30167, Hanover, Germany

    Erich Barke

Rights and permissions

Reprints and permissions

Copyright information

© 2000 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Eriksson, H., Larsson-Edefors, P. (2000). Impact of Voltage Scaling on Glitch Power Consumption. In: Soudris, D., Pirsch, P., Barke, E. (eds) Integrated Circuit Design. PATMOS 2000. Lecture Notes in Computer Science, vol 1918. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-45373-3_14

Download citation

  • DOI: https://doi.org/10.1007/3-540-45373-3_14

  • Published:

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-41068-3

  • Online ISBN: 978-3-540-45373-4

  • eBook Packages: Springer Book Archive

Publish with us

Policies and ethics

Search

Navigation