Abstract
As embryonic arrays take inspiration from nature they display biological properties, namely complex structure and fault-tolerance. However, hardware implementations have yet to take advantage of a further biological feature at a fundamental level; asynchronous operation. Scalability and reliability are seen as two areas in which embryonic arrays could benefit from asynchronous design. This paper builds upon a previous asynchronous embryonic architecture simulation. The addition of a two-fold reconfiguration strategy that provides fault-tolerance is detailed. The simulation’s design is similar to that of a macromodule library that has been implemented using Xilinx Virtex FPGAs, bringing the possibility of truly asynchronous embryonic circuits a step closer.
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Jackson, A.H., Tyrrell, A.M. (2001). Asynchronous Embryonics with Reconfiguration. In: Liu, Y., Tanaka, K., Iwata, M., Higuchi, T., Yasunaga, M. (eds) Evolvable Systems: From Biology to Hardware. ICES 2001. Lecture Notes in Computer Science, vol 2210. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-45443-8_8
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DOI: https://doi.org/10.1007/3-540-45443-8_8
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