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Performance and Power Comparative Study of Discrete Wavelet Transform on Programmable Processors

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Integrated Circuit Design. Power and Timing Modeling, Optimization and Simulation (PATMOS 2002)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 2451))

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Abstract

The Discrete Wavelet Transformations (DWT) are data intensive algorithms. Energy dissipation and execution time of such algorithms heavily depends on data memory hierarchy performance, when programmable platforms are considered. Existing filtering operations for the 1D-DWT, employ different levels of data accesses locality. However locality of data references, usually comes at the expense of complex control and addressing operations. In this paper, the two main scheduling techniques for the 1D-DWT are compared in terms of energy consumption and performance. Additionally, the effect of an in-place mapping scheme, which minimizes memory requirements and improves locality of data references for the 1D-DWT, is described and evaluated. As execution platform, two commercially available general purpose processors are used.

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Author information

Authors and Affiliations

  1. Alma Technologies S.A., 2 Marathonos Av. Pikermi, GR19009, Attica, Greece

    N. D. Zervas & G. Pagkless

  2. Dept. of Electrical and Computer Eng., Democritus University of Thrace, 67100, Xanthi, Greece

    M. Dasigenis & D. Soudris

Authors
  1. N. D. Zervas
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  2. G. Pagkless
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  3. M. Dasigenis
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  4. D. Soudris
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Editor information

Editors and Affiliations

  1. Ecole d’Ingénieurs du Canton de Vaud Microelectronics and Systems Institute, Digital Communications Team, Swiss University of Applied Science, Rue de Galilée 15, 1400, Yverdon, Switzerland

    Bertrand Hochet

  2. Instituto de Microelectrónica de Sevilla-CNM-CSIC Departamento do Diseño Digital Departamento de Electrónica y Electromagnetismo Departamento de Tecnología Electrónica, Universidad de Sevilla, Avda. Reina Mercedes, s/n. Edif. CICA

    Antonio J. Acosta  & Manuel J. Bellido  & 

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© 2002 Springer-Verlag Berlin Heidelberg

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Zervas, N.D., Pagkless, G., Dasigenis, M., Soudris, D. (2002). Performance and Power Comparative Study of Discrete Wavelet Transform on Programmable Processors. In: Hochet, B., Acosta, A.J., Bellido, M.J. (eds) Integrated Circuit Design. Power and Timing Modeling, Optimization and Simulation. PATMOS 2002. Lecture Notes in Computer Science, vol 2451. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-45716-X_32

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  • DOI: https://doi.org/10.1007/3-540-45716-X_32

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-44143-4

  • Online ISBN: 978-3-540-45716-9

  • eBook Packages: Springer Book Archive

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