Abstract
A design methodology for analog circuit blocks is proposed which combines circuit knowledge for predefined topologies with CAD simulation tools. In a more complex analog or mixed-signal system design metrics for each block are first established during an exploration phase based on analytical descriptions. In the proposed approach behavioral equations for each circuit are derived using a basic EKV model. Selection of a performance point in the design space results in a first sizing of the transistors in each block. This is followed by SPICE verification using foundry-provided process data. Additional numerical optimization is applied in a second iteration for closing the gap with the requirement specification.
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© 2002 Springer-Verlag Berlin Heidelberg
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Ionita, R., Vladimirescu, A., Jespers, P. (2002). Automated Design Methodology for CMOS Analog Circuit Blocks in Complex Systems. In: Hochet, B., Acosta, A.J., Bellido, M.J. (eds) Integrated Circuit Design. Power and Timing Modeling, Optimization and Simulation. PATMOS 2002. Lecture Notes in Computer Science, vol 2451. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-45716-X_49
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DOI: https://doi.org/10.1007/3-540-45716-X_49
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