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High Speed Homology Search Using Run-Time Reconfiguration

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Field-Programmable Logic and Applications: Reconfigurable Computing Is Going Mainstream (FPL 2002)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 2438))

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Abstract

In this paper, we show a new approach for homology search based on run-time reconfiguration. In our approach, the search consists of two phases, and different circuits are configured on demand during the search to make up for the limited memory bandwidth of off-the-shelf FPGA boards. Experiments with an off-the-shelf FPGA (Xilinx XCV2000E) board showed good results. The time for comparing a query sequence of 2,048 elements with a database sequence of 64 million elements by the Smith-Waterman algorithm is about 34 sec, which is about 330 times faster than a desktop computer with a 1GHz Pentium-III.

This work was supported by Grant-in-Aid for Scientific Research on Priority Areas (C) “Genome Information Science” from the Ministry of Education, Culture, Sports, Science and Technology of Japan, and Japan Society for the Promotion of Science (JSPS) Research Fellowships for Young Scientists (#5304).

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© 2002 Springer-Verlag Berlin Heidelberg

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Yamaguchi, Y., Miyajima, Y., Maruyama, T., Konagaya, A. (2002). High Speed Homology Search Using Run-Time Reconfiguration. In: Glesner, M., Zipf, P., Renovell, M. (eds) Field-Programmable Logic and Applications: Reconfigurable Computing Is Going Mainstream. FPL 2002. Lecture Notes in Computer Science, vol 2438. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-46117-5_30

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  • DOI: https://doi.org/10.1007/3-540-46117-5_30

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-44108-3

  • Online ISBN: 978-3-540-46117-3

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