Abstract
This paper describes a flexible power model for FPGAs. The model estimates the dynamic, short circuit, and leakage power for a wide variety of FPGA architectures. Such a model will be essential in the design and research of next-generation FPGAs, where power will be one of the primary optimization goals. The model has been integrated into the VPR CAD flow, and is available to the research community for use in FPGA architectural and CAD tool experimentation.
This work was supported by Micronet, the British Columbia Advanced Systems Institute, and the Natural Sciences and Engineering Research Council of Canada
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Poon, K.K., Yan, A., Wilton, S.J. (2002). A Flexible Power Model for FPGAs. In: Glesner, M., Zipf, P., Renovell, M. (eds) Field-Programmable Logic and Applications: Reconfigurable Computing Is Going Mainstream. FPL 2002. Lecture Notes in Computer Science, vol 2438. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-46117-5_33
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DOI: https://doi.org/10.1007/3-540-46117-5_33
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