Abstract
A method for simulation-emulation co-operation of Verilog and VHDL models is presented. The method is based on using Programming Language Interface (PLI) to achieve speedup in prototyping and to facilitate the communication between an emulator and a simulator. The PLI technique is implemented for both Verilog and VHDL models. The results show that this simulation-emulation co-operation method can significantly reduce the simulation time of a design implemented by VHDL codes as well as Verilog codes.
This is a preview of subscription content, log in via an institution.
Buying options
Tax calculation will be finalised at checkout
Purchases are for personal use only
Learn about institutional subscriptionsPreview
Unable to display preview. Download preview PDF.
References
Abramovici, M., Breuer, M. A., and Friedman, A. D., Digital Systems Testing and Testable Design, Revised edition, IEEE Press, 1995.
Bauer, J., Bershteyn, M., Kaplan, I., and Vyedin, P., “A Reconfigurable Logic Machine for Fast Event-Driven Simulation”, in Proceedings of ACM/IEEE Design Automation Conf. (DAC), 1998, pp. 668–671.
Canellas, N., Moreno, J. M., “Speeding up hardware prototyping by incremental Simulation/Emulation”, in Proceedings of 11th International Workshop on Rapid System Prototyping, 2000.
De Micheli, G., Synthesis and Optimization of Digital Circuits, McGraw-Hill, 1994.
Kirovski, D., Potkonjak, L, Guerra, M., “Improving the Observability and Controllability of Datapaths for Emulation-Based Debugging”, in IEEE trans. CAD of IC and System, 1999.
Kirovski, D., Potkonjak, L, Guerra, M., “Cut-Based Functional Debugging for Programmable System-on-Chip,” in IEEE trans. on VLSI, 2000.
Kudlugi, M., Hassoun, S., Selvidge, C., Pryor, D., “A Transaction-Based Unified Simulation/Emulation Architecture for Functional Verification,” in Proceedings of 38th ACM/IEEE Design Automation Conference, 2001, pp. 623–628.
Mittra, S., Principles of Verilog PLI, Kluwer Academic Publishers, 1999.
Rowson, J. A., “Hardware/Software Co-Simulation”, in Proceedings of 31st ACM/IEEE Design Automation Conference, 1996, pp. 439–440.
Varghese, J., Butts, M., and Batcheller, J., “An efficient logic emulation system,” IEEE Trans. on VLSI Syst., vol. 1, June 1993, pp. 171–174.
Walters, S., “Computer-aided prototyping for ASIC-based system”, IEEE Design Test Comput., June 1991, pp. 4–10.
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2002 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Sarmadi, S.B., Miremadi, S.G., Asadi, G., Ejlali, A.R. (2002). Fast Prototyping with Co-operation of Simulation and Emulation. In: Glesner, M., Zipf, P., Renovell, M. (eds) Field-Programmable Logic and Applications: Reconfigurable Computing Is Going Mainstream. FPL 2002. Lecture Notes in Computer Science, vol 2438. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-46117-5_4
Download citation
DOI: https://doi.org/10.1007/3-540-46117-5_4
Published:
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-44108-3
Online ISBN: 978-3-540-46117-3
eBook Packages: Springer Book Archive